1.5-A DDR termination regulator with shutdown pin
Product details
Parameters
Package | Pins | Size
Features
- AEC-Q100 Test Guidance with the following results
(SO PowerPAD-8):- Device HBM ESD Classification Level H1C
- Junction Temperature Range –40°C to 125°C
- 1.35 V Minimum VDDQ
- Source and Sink Current
- Low Output Voltage Offset
- No External Resistors Required
- Linear Topology
- Suspend to Ram (STR) Functionality
- Low External Component Count
- Thermal Shutdown
Description
The LP2998 linear regulator is designed to meet JEDEC SSTL-2 and JEDEC SSTL-18 specifications for termination of DDR-SDRAM and DDR2 memory. The device also supports DDR3 and DDR3L VTT bus termination with VDDQ min of 1.35 V. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5 A continuous current and transient peaks up to 3 A in the application as required for DDR-SDRAM termination. The LP2998 also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs.
An additional feature found on the LP2998 is an active low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. When SD is pulled low the VTT output will tri-state providing a high impedance output, but, VREF will remain active. A power savings advantage can be obtained in this mode through lower quiescent current.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The LP2998 evaluation board is designed to provide the design Engineer with a fully functional prototype system in which to evaluate the LP2998 in both a static environment and with a complete memory system.
Design tools & simulation
Reference designs
Design files
-
download TIDA-010011 BOM.pdf (134KB) -
download TIDA-010011 Assembly Drawing.pdf (1564KB) -
download TIDA-010011 PCB.pdf (4603KB) -
download TIDA-010011 CAD Files.zip (7015KB) -
download TIDA-010011 Gerber.zip (799KB)
Design files
-
download PMP10601 BOM.pdf (123KB) -
download PMP10601 Gerber.zip (9147KB)
Design files
-
download PMP10630 BOM.pdf (96KB) -
download PMP10630 PCB.pdf (604KB) -
download PMP10630 Gerber.zip (406KB)
Design files
-
download PMP10600 BOM.pdf (123KB) -
download PMP10600 Gerber.zip (9189KB)
Design files
-
download PMP10613 BOM.pdf (136KB) -
download PMP10613 Altium.zip (10039KB) -
download PMP10613 Gerber.zip (2781KB)
Design files
-
download PMP9766 BOM.pdf (101KB) -
download PMP9766 PCB.pdf (308KB) -
download PMP9766 PCB (3D).pdf (382KB) -
download PMP9766 Gerber.zip (330KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SO PowerPAD (DDA) | 8 | View options |
SOIC (D) | 8 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
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