Packaging information
| Package | Pins CDIP (JT) | 28 |
| Operating temperature range (°C) -55 to 125 |
| Package qty | Carrier 13 | TUBE |
Features for the SN54ACT8997
- Members of the Texas Instruments SCOPETM Family of Testability Products
- Compatible With the IEEE Standard 1149.1-1990 (JTAG) Serial Test Bus
- Allow Partitioning of System Scan Paths
- Can Be Cascaded Horizontally or Vertically
- Select Up to Four Secondary Scan Paths to Be Included in a Primary Scan Path
- Include 8-Bit Programmable Binary Counter to Count or Initiate Interrupt Signals
- Include 4-Bit Identification Bus for Scan-Path Identification
- Inputs Are TTL Compatible
- EPICTM (Enhanced-Performance Implanted CMOS) 1-
m Process
- Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs
SCOPE and EPIC are trademarks of Texas Instruments
Incorporated.
Description for the SN54ACT8997
The 'ACT8997 are members of the Texas Instruments SCOPETM testability integrated-circuit family. This family of components facilitates testing of complex circuit-board assemblies.
The 'ACT8997 enhance the scan capability of TI's SCOPETM family by allowing augmentation of a system's primary scan path with secondary scan paths (SSPs), which can be individually selected by the 'ACT8997 for inclusion in the primary scan path. These devices also provide buffering of test signals to reduce the need for external logic.
By loading the proper values into the instruction register and data registers, the user can select up to four SSPs to be included in a primary scan path. Any combination of the SSPs can be selected at a time. Any of the device's six data registers or the instruction register can be placed in the device's scan path, i.e., placed between test data input (TDI) and test data output (TDO) for subsequent shift and scan operations.
All operations of the device except counting are synchronous to the test clock pin (TCK). The 8-bit programmable up/down counter can be used to count transitions on the device condition input (DCI) pin and output interrupt signals via the device condition output (DCO) pin. The device can be configured to count on either the rising or falling edge of DCI.
The test access port (TAP) controller is a finite-state machine compatible with IEEE Standard 1149.1.
The SN54ACT8997 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ACT8997 is characterized for operation from 0°C to 70°C.