Automotive Catalog EMC-Optimized High-Speed CAN Transceiver
Product details
Parameters
We are not able to display this information. Please refer to the product data sheet.Package | Pins | Size
Features
- Qualified for Automotive Applications
- Meets or Exceeds the Requirements of
ISO 11898-2 - GIFT/ICT Compliant
- ESD Protection up to ±12 kV (Human-Body
Model) on Bus Pins - High Electromagnetic Compliance (EMC)
- SPLIT (VREF) Voltage Source for Common-Mode
Stabilization of Bus Through Split Termination - Digital Inputs Compatible With 3.3-V and 5-V
Microprocessors - Protection Features
- Bus-Fault Protection of –27 V to 40 V
- TXD Dominant Time-Out
- Thermal Shutdown Protection
- Power-Up and Power-Down Glitch-Free Bus
Inputs and Outputs
Description
The SN65HVDA1050A-Q1 meets or exceeds the specifications of the ISO 11898 standard for use in applications employing a controller area network (CAN). The device is qualified for use in automotive applications. As a CAN bus transceiver, this device provides differential transmit capability to the bus and differential receive capability to a CAN controller at signaling rates up to 1 megabit per second (Mbps). The signaling rate of a line is the number of voltage transitions that are made per second expressed in bits per second (bps).
The SN65HVDA1050A-Q1 device is designed for operation in especially harsh environments and includes many device protection features such as undervoltage lockout, overtemperature thermal shutdown, wide common-mode range, and loss of ground protection. The bus pins are also protected against external cross-wiring, shorts to sources from –27 V to 40 V, and voltage transients according to ISO 7637.
Same functionality but is not pin-for-pin or parametrically equivalent to the compared device:
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | SN65HVDA1050A-Q1 EMC-Optimized High-Speed CAN Bus Transceiver datasheet (Rev. B) | Jul. 01, 2015 |
Application note | Introduction to the Controller Area Network (CAN) (Rev. B) | May 19, 2016 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
SOIC (D) | 8 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
TI E2E™ forums with technical support from TI engineers
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.