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10 MHz - 85 MHz Automotive 28-bit Flat Panel Display Link LVDS

SN65LVDS93B-Q1

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Product details

Parameters

Function Serializer Rating Automotive Operating temperature range (C) -40 to 85 open-in-new Find other Display SerDes

Package | Pins | Size

TSSOP (DGG) 56 113 mm² 14 x 8.1 open-in-new Find other Display SerDes

Features

  • AEC-Q100 Qualified for Automotive Applications
    • Temperature Grade 3: –40°C to 85°C
    • HBM ESD Classification 3
    • CDM ESD Classification C6
  • LVDS Display Series Interfaces Directly to LCD Display Panels With Integrated LVDS
  • Package: 14-mm x 6.1-mm TSSOP
  • 1.8-V Up to 3.3-V Tolerant Data Inputs to Connect Directly to Low-Power, Low-Voltage Application and Graphic Processors
  • Transfer Rate up to 85 Mpps (Mega Pixel Per Second); Pixel Clock Frequency Range 10 MHz to 85 MHz; Max 2.38 Gbps data rate supported
  • Suited for Display Resolutions Ranging From HVGA up to HD With Low EMI
  • Operates From a Single 3.3-V Supply and 170 mW (Typical) at 75 MHz
  • 28 Data Channels Plus Clock in Low-Voltage TTL to 4 Data Channels Plus Clock Out Low-Voltage Differential
  • Consumes Less Than 1 mW When Disabled
  • Selectable Rising or Falling Clock Edge Triggered Inputs
  • Support Spread Spectrum Clocking (SSC)
  • Supports RGB 888 to LVDS I Conversion

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Description

The SN65LVDS93B-Q1 transmitter contains four 7-bit parallel-load serial-out shift registers, a 7X clock synthesizer, and five Low-Voltage Differential Signaling (LVDS) line drivers in a single integrated circuit. These functions allow 28 bits of single-ended LVTTL data to be synchronously transmitted over five balanced-pair conductors for receipt by a compatible receiver, such as the DS90CR286A-Q1 and LCD panels with integrated LVDS receiver.

When transmitting, data bits D0 through D27 are each loaded into registers upon the edge of the input clock signal (CLKIN). The rising or falling edge of the clock can be selected via the clock select (CLKSEL) pin. The frequency of CLKIN is multiplied seven times, and then used to unload the data registers in 7-bit slices and serially. The four serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN.

The SN65LVDS93B-Q1 requires no external components and little or no control. The data bus appears the same at the input to the transmitter and output of the receiver with the data transmission transparent to the user(s). The only user intervention is selecting a clock rising edge by inputting a high level to CLKSEL or a falling edge with a low-level input, and the possible use of the Shutdown/Clear (SHTDN). SHTDN is an active-low input to inhibit the clock, and shut off the LVDS output drivers for lower power consumption. A low-level on this signal clears all internal registers to a low-level.

The SN65LVDS93B-Q1 is characterized for operation over ambient air temperatures of –40°C to 85°C.

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Technical documentation

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Type Title Date
* Datasheet SN65LVDS93B-Q1 10 MHz - 85 MHz Automotive 28-bit Flat Panel Display Link LVDS SerDes Transmitter datasheet (Rev. A) May 15, 2018
Application notes High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs Nov. 09, 2018
Application notes AN-1108 Channel-Link PCB and Interconnect Design-In Guidelines (Rev. A) Aug. 03, 2018
Technical articles How to select serializers and deserializers in HMI systems Apr. 24, 2018
User guides LVDS83BTSSOPEVM User's Guide Oct. 13, 2017

Design & development

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Hardware development

EVALUATION BOARDS Download
document-generic User guide
$599.00
Description
The SN75LVDS83B transmitter contains four 7-bit parallel-load serial-out shift registers, a 7X clock synthesizer, and five Low-Voltage Differential Signaling (LVDS) line drivers in a single integrated circuit. These functions allow 28 bits of single-ended LVTTL data to be synchronously transmitted (...)
Features
  • Plug and play design
  • Power the EVM by USB VBUS or 5- to 5.5-V DC IN through a power jack J3
  • Access the I2C bus through headers
  • Configurable through dip Switches

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SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

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TSSOP (DGG) 56 View options

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