Home Logic & voltage translation Flip-flops, latches & registers D-type flip-flops
Home
Logic & voltage translation
Flip-flops, latches & registers
D-type flip-flops

SN74AC74

ACTIVE

Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset

Order now
Data sheet

SN74AC74

ACTIVE
Data sheet Order now

Product details

Number of channels 2 Technology family AC Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 100 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 20 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 85 Rating Catalog
Number of channels 2 Technology family AC Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 100 IOL (max) (mA) 24 IOH (max) (mA) -24 Supply current (max) (µA) 20 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 85 Rating Catalog
SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm) WQFN (BQA) 14 7.5 mm² (3 mm × 2.5 mm) TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm) SSOP (DB) 14 48.36 mm² (6.2 mm × 7.8 mm)
  • 2V to 6V VCC operation
  • Inputs accept voltages to 6V
  • Maximum tpd of 10ns at 5V
  • 2V to 6V VCC operation
  • Inputs accept voltages to 6V
  • Maximum tpd of 10ns at 5V

The ’AC74 devices are dual positive-edge-triggered D-type flip-flops.

The ’AC74 devices are dual positive-edge-triggered D-type flip-flops.
filter Find other D-type flip-flops
Download View video with transcript Video

Similar products you might be interested in

open-in-new Compare alternates
Pin-for-pin with same functionality to the compared device.
SN74HCS74 ACTIVE Schmitt-trigger input dual D-type positive-edge-triggered flip-flops w/ clear and preset Voltage range 2V to 6V, average propagation delay 20ns, average drive strength 8mA
SN74HC74 ACTIVE Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset Voltage range 2V to 6V, average propagation delay 20ns, average drive strength 8mA
CD74HC74 ACTIVE High Speed CMOS Logic Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset Voltage range 2V to 6V, average propagation delay 20ns, average drive strength 8mA

Technical documentation

No results found. Please clear your search and try again.
View all 2
Top documentation Type Title Format options Date
* Data sheet SNx4AC74 Dual Positive-Edge-Triggered D-Type Flip-Flops with Clear and Preset datasheet (Rev. H) PDF | HTML Jun 2, 2025
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML Dec 15, 2022

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Package Pins CAD symbols, footprints & 3D models
SOIC (D) 14 Ultra Librarian
PDIP (N) 14 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
SSOP (DB) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos