These devices contain two independent positive-edge-triggered D-type flip-flops. A low level at the preset (
) or clear (
) inputs sets or resets the outputs regardless of the levels of the other inputs. When and are inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
The SN54ALS74A and SN54AS74A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS74A and SN74AS74A are characterized for operation from 0°C to 70°C.
| Part number | Order | Technology Family | VCC (Min) (V) | VCC (Max) (V) | Bits (#) | Voltage (Nom) (V) | F @ nom voltage (Max) (MHz) | ICC @ nom voltage (Max) (mA) | tpd @ nom Voltage (Max) (ns) | IOL (Max) (mA) | IOH (Max) (mA) | 3-state output | Rating | Operating temperature range (C) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| SN74ALS74A |
|
ALS | 4.5 | 5.5 | 2 | 5 | 70 | 4 | 18 | 8 | -0.4 | No | Catalog | 0 to 70 |
| SN54ALS74A | Samples not available | ALS | 4.5 | 5.5 | 2 | 5 | 75 | 4 | 18 | 8 | -0.4 | No | Military | -55 to 125 |
