SN74AUP1G07

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Low-Power Single Buffer/Driver with Open-Drain Outputs

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Product details

Parameters

Technology Family AUP VCC (Min) (V) 0.8 VCC (Max) (V) 3.6 Channels (#) 1 IOL (Max) (mA) 4 IOH (Max) (mA) 0 Input type Standard CMOS Output type Open-Drain Features Very high speed (tpd 5-10ns), Partial power down (Ioff), Over-voltage tolerant inputs Data rate (Mbps) 200 Rating Catalog open-in-new Find other Non-Inverting buffer/driver

Package | Pins | Size

DSBGA (YFP) 4 0 mm² .8 x .8 DSBGA (YZP) 5 2 mm² .928 x 1.428 SOT-23 (DBV) 5 5 mm² 2.9 x 1.6 SOT-5X3 (DRL) 5 3 mm² 1.6 x 1.6 SOT-SC70 (DCK) 5 4 mm² 2 x 2.1 USON (DRY) 6 1 mm² 1.5 x 1 X2SON (DPW) 5 1 mm² .8 x .8 X2SON (DSF) 6 1 mm² 1 x 1 open-in-new Find other Non-Inverting buffer/driver

Features

  • Available in the Ultra Small 0.64 mm2 Package (DPW) with 0.5-mm Pitch
  • Low Static-Power Consumption
    (ICC = 0.9 µA Maximum)
  • Low Dynamic-Power Consumption
    (Cpd = 1 pF Typical at 3.3 V)
  • Low Input Capacitance (Ci = 1.5 pF Typical)
  • Low Noise – Overshoot and Undershoot
    <10% of VCC
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input
    (Vhys = 250 mV Typ at 3.3 V)
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 3.3 ns Maximum at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
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Description

The SN74AUP1G07 device is a single buffer gate with open drain output that operates from 0.8 V to 3.6 V.

open-in-new Find other Non-Inverting buffer/driver
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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 7
Type Title Date
* Datasheet SN74AUP1G07 Low-Power Single Buffer/Driver With Open-Drain Outputs datasheet (Rev. J) Dec. 13, 2013
Selection guides Little Logic Guide 2018 (Rev. G) Jul. 06, 2018
Application notes Designing and Manufacturing with TI's X2SON Packages Aug. 23, 2017
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes How to Select Little Logic (Rev. A) Jul. 26, 2016
Application notes Understanding Schmitt Triggers Sep. 21, 2011
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
10
Description
Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
EVALUATION BOARDS Download
document-generic User guide
Description
DLP® LightCrafter Display 4710 EVM-G2 is an easy to use, plug and play evaluation platform for the Full HD DLP4710 chipset. The DLP4710 chipset is designed to be used in a wide array of display applications like mobile projectors, screenless TVs, interactive displays and digital signage. The DLP4710 (...)
Features
  • 1080p HD display using DLP4710
  • Digital controller for the DLP4710 DMD, DLPC3439
  • PMIC/LED driver for the DLP4710 DMD and DLPC3439 controller, DLPA3005
  • Production ready RGB LED optical engine from YoungOptics
  • DLP4710, DLPC3439 Configuration and Support Firmware

Design tools & simulation

SIMULATION MODELS Download
SCEM443.ZIP (48 KB) - IBIS Model
SIMULATION MODELS Download
SCEM691.ZIP (7 KB) - PSpice Model

Reference designs

REFERENCE DESIGNS Download
Ultra Mobile, Low Power DLP® Pico™ qHD Display Reference Design
TIDA-080002 — The 0.23 qHD DLP chipset is an affordable platform enabling the use of DLP technology with embedded host processor. This chipset is incorporated in to this reference design to enable a low power, on-demand free-form sub-system display for a variety of applications.
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Portable, Low Power HD Display with Increased Brightness Reference Design Using DLP® Technology
TIDA-01571 — This display reference design features the DLP Pico™ 0.3-inch TRP HD 720p display chipset and is implemented in the DLP LightCrafter™ Display 3010-G2 evaluation module (EVM). It enables the use of HD resolution for projection display applications such as mobile smart TV, virtual (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Compact Full HD 1080p (up to 16 Amps) Projection Display Reference Design Using DLP Pico Technology
TIDA-01226 — This reference design, featuring the DLP Pico™ 0.47-inch TRP Full-HD 1080p display chipset and implemented in the DLP LightCrafter Display 4710 G2 evaluation module (EVM), enables use of full HD resolution for projection display applications such as accessory projectors, screenless displays (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
High Speed DLP Sub-system for Industrial 3D Printing and Digital Lithography Reference Design
TIDA-00570 The High Speed DLP® Sub-system Reference Design provides system-level DLP development board designs for industrial Digital Lithography and 3D Printing applications that require high resolution, superior speed and production reliability. The system design offers maximum throughput by integrating (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
DSBGA (YFP) 4 View options
DSBGA (YZP) 5 View options
SC70 (DCK) 5 View options
SON (DRY) 6 View options
SON (DSF) 6 View options
SOT-23 (DBV) 5 View options
SOT-5X3 (DRL) 5 View options
X2SON (DPW) 5 View options

Ordering & quality

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