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SN74AUP2G14

ACTIVE

2-ch, 0.8-V to 3.6-V low power inverters with Schmitt-Trigger inputs

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Data sheet

SN74AUP2G14

ACTIVE
Data sheet Order now

Product details

Technology family AUP Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 3.6 Number of channels 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Supply current (max) (µA) 10 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AUP Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 3.6 Number of channels 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Supply current (max) (µA) 10 Input type Schmitt-Trigger Output type Push-Pull Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
DSBGA (YFP) 6 1.4000000000000001 mm² 1 x 1.4000000000000001 SOT-SC70 (DCK) 6 4.2 mm² 2 x 2.1 USON (DRY) 6 1.45 mm² 1.45 x 1 X2SON (DSF) 6 1 mm² 1 x 1
  • Available in the Texas Instruments NanoStar™ package
  • Low static-power consumption (ICC = 0.9µA maximum)
  • Low dynamic-power consumption (Cpd = 4.3pF typical at 3.3V)
  • Low input capacitance (Ci = 1.5pF typical)
  • Low noise – overshoot and undershoot <10% of VCC
  • Ioff supports partial-power-down mode operation
  • Wide operating VCC range of 0.8V to 3.6V
  • Optimized for 3.3V operation
  • 3.6V I/O tolerant to support mixed-mode signal Operation
  • tpd = 4.3ns maximum at 3.3V
  • Suitable for point-to-point applications
  • Latch-up performance exceeds 100mA Per JESD 78, Class II
  • ESD performance tested per JESD 22
    • 2000V human-body model (A114-B, Class II)
    • 1000V charged-device model (C101)
  • Available in the Texas Instruments NanoStar™ package
  • Low static-power consumption (ICC = 0.9µA maximum)
  • Low dynamic-power consumption (Cpd = 4.3pF typical at 3.3V)
  • Low input capacitance (Ci = 1.5pF typical)
  • Low noise – overshoot and undershoot <10% of VCC
  • Ioff supports partial-power-down mode operation
  • Wide operating VCC range of 0.8V to 3.6V
  • Optimized for 3.3V operation
  • 3.6V I/O tolerant to support mixed-mode signal Operation
  • tpd = 4.3ns maximum at 3.3V
  • Suitable for point-to-point applications
  • Latch-up performance exceeds 100mA Per JESD 78, Class II
  • ESD performance tested per JESD 22
    • 2000V human-body model (A114-B, Class II)
    • 1000V charged-device model (C101)

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8V to 3.6V, resulting in increased battery life (see Figure 5-1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 5-2).

The SN74AUP2G14 contains two inverters and performs the Boolean function Y = A. The device functions as two independent inverters, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negative-going (VT–) signals.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8V to 3.6V, resulting in increased battery life (see Figure 5-1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 5-2).

The SN74AUP2G14 contains two inverters and performs the Boolean function Y = A. The device functions as two independent inverters, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negative-going (VT–) signals.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN74AUP2G14 Low-Power Dual Schmitt-Trigger Inverter datasheet (Rev. D) PDF | HTML 01 Jun 2025
Selection guide Logic Guide (Rev. AC) PDF | HTML 13 Nov 2025
Application brief Understanding Schmitt Triggers (Rev. B) PDF | HTML 17 Apr 2025
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004

Design & development

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Evaluation board

5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
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Evaluation board

5-8-NL-LOGIC-EVM — Generic logic and translation EVM supporting 5 to 8 pin DPW, DQE, DRY, DSF, DTM, DTQ and DTT pkgs

Generic EVM designed to support any logic or translation device that has a DTT, DRY, DPW, DTM, DQE, DQM, DSF, or DTQ package. Board design allows for flexible evaluation.

User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74AUP2G14 Behavioral SPICE Model

SCEM674.ZIP (7 KB) - PSpice Model
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Package Pins CAD symbols, footprints & 3D models
DSBGA (YFP) 6 Ultra Librarian
SOT-SC70 (DCK) 6 Ultra Librarian
USON (DRY) 6 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian
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