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Single-bit dual-supply bus transceiver

SN74AXCH1T45

ACTIVE

Product details

Parameters

Technology Family AXC Applications GPIO Bits (#) 1 High input voltage (Min) (Vih) 0.455 High input voltage (Max) (Vih) 3.6 Output voltage (Min) (V) 0.65 Output voltage (Max) (V) 3.6 IOH (Max) (mA) -12 IOL (Max) (mA) 12 Rating Catalog open-in-new Find other Direction-controlled voltage translators

Package | Pins | Size

SOT-23 (DBV) 6 5 mm² 2.9 x 1.6 SOT-SC70 (DCK) 6 4 mm² 2 x 2.1 USON (DRY) 6 1 mm² 1.5 x 1 X2SON (DTQ) 6 1 mm² 1 x 0.8 open-in-new Find other Direction-controlled voltage translators

Features

  • Fully Configurable Dual-Rail Design Allows Each Port to Operate With a Power Supply Range from 0.65 V to 3.6 V
  • Operating Temperature: –40°C to +125°C
  • Glitch-Free Power Supply Sequencing
  • Bus-hold on Data Inputs Eliminates the Need for External Pullup or Pulldown Resistors
  • Maximum Quiescent Current (ICCA + ICCB) of 10 µA (85°C Maximum) and 16 µA (125°C Maximum)
  • Up to 500-Mbps Support When Translating from 1.8 to 3.3 V
  • VCC Isolation Feature
    • If Either VCC Input is Below 100 mV, All I/Os Outputs are Disabled and Become High-Impedance
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human Body Model
    • 1000-V Charged-Device Model

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Description

The SN74AXCH1T45 is a single-bit noninverting bus transceiver that uses two individually configurable power-supply rails. The device is operational with both VCCA and VCCB supplies as low as 0.65 V. The A port is designed to track VCCA, which accepts any supply voltage from 0.65 V to 3.6 V. The B port is designed to track VCCB, which also accepts any supply voltage from 0.65 V to 3.6 V. Additionally the SN74AXCH1T45 is compatible with a single-supply system.

The DIR pin determines the direction of signal propagation. With the DIR pin configured HIGH, translation is from Port A to Port B. With DIR configured LOW, translation is from Port B to Port A. The DIR pin is referenced to VCCA, meaning that its logic-high and logic-low thresholds track with VCCA.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. If a supply is present for VCCA or VCCB, the bus-hold circuitry always remains active on the A or B inputs respectively, independent of the state of the direction control pin.

This device is fully specified for partial-power-down applications using the Ioff current. The Ioff protection circuitry ensures that no excessive current is drawn from or to an input, output, or combined I/O that is biased to a specific voltage while the device is powered down.

The VCC isolation feature ensures that if either VCCA or VCCB is less than 100 mV, both I/O ports enter a high-impedance state by disabling their outputs.

Glitch-free power supply sequencing allows either supply rail to be powered on or off in any order while providing robust power sequencing performance.

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Technical documentation

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No results found. Please clear your search and try again. View all 5
Type Title Date
* Datasheet SN74AXCH1T45 Single-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation, Tri-State Outputs, and Bus-Hold Inputs datasheet (Rev. C) Sep. 09, 2020
Selection guide Voltage translation buying guide Jun. 13, 2019
Application note Low Voltage Translation for SPI, UART, RGMII, JTAG Interfaces (Rev. A) Apr. 02, 2019
Application note Glitch free power sequencing with AXC level translators (Rev. A) Sep. 20, 2018
Application note An Overview of Bus-Hold Circuit and the Applications (Rev. B) Sep. 17, 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
10
Description
Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
EVALUATION BOARD Download
20
Description

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC is (...)

Features
  • SMB connector available for high speed operation
  • Ground port available on each header pin to maintain signal integrity
  • DIR and OE have 10K ohm pull up /pull down resistor options
  • Designed to support up to 20 different devices
EVALUATION BOARD Download
20
Description

This EVM is designed to support SN74AXC8T245 in the RJW package and SN74AXC1T45 in DEA and the DTQ packages. There is also option of populating the SN74AVC4T245 in the RSV package. It is also designed to support the bus hold and Q1 devices for the respective channel counts.

The AXC devices belong to (...)

Features
  • High speed SMB connector available
  • Ground port for each header pin supports high speed measurement
  • DIR and OE pin have the option of 10K ohm resistor pullup or pulldown
  • Layout optimized for high speed connectivity
  • Highlights the Small Package technology of TI

Design tools & simulation

SIMULATION MODEL Download
SCEM584.ZIP (27 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
SC70 (DCK) 6 View options
SON (DRY) 6 View options
SOT-23 (DBV) 6 View options
X2SON (DTQ) 6 View options

Ordering & quality

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  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Support & training

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