These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight latches of the ´F373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs will follow the data (D) inputs. When the latch enable is taken low, the Q outputs are latched at the logic levels set up at the D inputs.
A buffered output-enable () input can be used to place the eight outputs in either a normal
logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
The output-enable () input does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The SN74F373 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54F373 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74F373 is characterized for operation from 0°C to 70°C.
|Part number||Order||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Bits (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||IOL (Max) (mA)||IOH (Max) (mA)||3-state output||Rating||Operating temperature range (C)|
||F||4.5||5.5||8||5||70||55||8||24||-3||Yes||Catalog||0 to 70|
|SN54F373||Samples not available||F||4.5||5.5||8||5||70||55||8||24||-3||Yes||Military||-55 to 125|