SN74HC175 Quadruple D-Type Flip-Flops With Clear | TI.com

SN74HC175
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Quadruple D-Type Flip-Flops With Clear

Quadruple D-Type Flip-Flops With Clear - SN74HC175
Datasheet
 

Description

These positive-edge-triggered D-type flip-flops have a direct clear (CLR)\ input. The ’HC175 devices feature complementary outputs from each flip-flop.

Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.

Features

  • Wide Operating Voltage Range of 2 V to 6 V
  • Outputs Can Drive Up To 10 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • Contain Four Flip-Flops With Double-Rail Outputs
  • Typical tpd = 13 ns
  • ±4-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • Applications Include:
    • Buffer/Storage Registers
    • Shift Registers
    • Pattern Generators

Parametrics

Compare all products in D-type flip-flop Email Download to Excel
Part number Order Technology Family Input type Output type VCC (Min) (V) VCC (Max) (V) IOL (Max) (mA) IOH (Max) (mA) Rating Package Group
SN74HC175 Order now HC     CMOS     CMOS     2     6     5.2     -5.2     Catalog     PDIP | 16
SOIC | 16
SO | 16
SSOP | 16
TSSOP | 16    
SN54HC175 Samples not available HC     CMOS     CMOS     2     6     5.2     -5.2     Military     CDIP | 16
CFP | 16
LCCC | 20