These devices are positive-edge-triggered octal D-type flip-flops with an enable input. The HC377 devices are similar to the HC273 devices, but feature a latched clock-enable (CLKEN)\ input instead of a common clear.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse, if CLKEN\ is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output. These devices are designed to prevent false clocking by transitions at CLKEN\.
|Part number||Order||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Bits (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||IOL (Max) (mA)||IOH (Max) (mA)||3-state output||Rating||Operating temperature range (C)|
|28||0.08||34||5.2||-5.2||No||Catalog||-40 to 85|
|SN54HC377||Samples not available||HC||2||6||8||
|28||0.08||34||5.2||-5.2||No||Military||-55 to 125|