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SN74HC574

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Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs

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Data sheet

SN74HC574

ACTIVE
Data sheet Order now

Product details

Number of channels 8 Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type Standard CMOS Output type 3-State Clock frequency (max) (MHz) 28 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 80 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 85 Rating Catalog
Number of channels 8 Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type Standard CMOS Output type 3-State Clock frequency (max) (MHz) 28 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 80 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 85 Rating Catalog
PDIP (N) 20 228.702 mm² 24.33 x 9.4 SOIC (DW) 20 131.84 mm² 12.8 x 10.3 SOP (NS) 20 98.28 mm² 12.6 x 7.8 SSOP (DB) 20 56.16 mm² 7.2 x 7.8 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current 3-State Noninverting Outputs Drive Bus Lines Directly or Up to 15 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 22 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1-µA Max
  • Bus-Structured Pinout
  • On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.
  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current 3-State Noninverting Outputs Drive Bus Lines Directly or Up to 15 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 22 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1-µA Max
  • Bus-Structured Pinout
  • On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.
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Technical documentation

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Type Title Date
* Data sheet SNx4HC574 Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs datasheet (Rev. H) 06 May 2022
More literature Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 15 Dec 2022
More literature Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
More literature Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
More literature TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
More literature CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
More literature Designing With Logic (Rev. C) 01 Jun 1997
More literature Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
More literature Live Insertion 01 Oct 1996
More literature SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
More literature Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

User guide: PDF | HTML
Not available on TI.com
Package Pins Download
PDIP (N) 20 View options
SOIC (DW) 20 View options
SOP (NS) 20 View options
SSOP (DB) 20 View options
TSSOP (PW) 20 View options

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