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SN74HCS273-Q1

ACTIVE

Automotive octal D-type flip-flops with clear

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Data sheet

SN74HCS273-Q1

ACTIVE
Data sheet Order now

Product details

Number of channels 8 Technology family HCS Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type Schmitt-Trigger Output type Push-Pull Clock frequency (max) (MHz) 45 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Automotive
Number of channels 8 Technology family HCS Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type Schmitt-Trigger Output type Push-Pull Clock frequency (max) (MHz) 45 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Automotive
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 VQFN (RKS) 20 11.25 mm² 4.5 x 2.5
  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • Available in wettable flank QFN (WRKS) package
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • Available in wettable flank QFN (WRKS) package
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V

The SN74HCS273-Q1 device contains eight positive-edge-triggered D-type flip-flops with Schmitt-trigger inputs, shared asynchronous active low clear (CLR) input, and shared rising-edge triggered clock (CLK) input.

The SN74HCS273-Q1 device contains eight positive-edge-triggered D-type flip-flops with Schmitt-trigger inputs, shared asynchronous active low clear (CLR) input, and shared rising-edge triggered clock (CLK) input.
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Technical documentation

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* Data sheet SN74HCS273-Q1 Automotive Octal D-Type Flip-Flop with Schmitt-Trigger Inputs and Asynchronous Clear datasheet (Rev. C) PDF | HTML 10 Jan 2023

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Simulation model

IBIS Model for SN74HCS273, SN74HCS273-Q1

SCLM337.ZIP (51 KB) - IBIS Model
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Package Pins Download
TSSOP (PW) 20 View options
VQFN (RKS) 20 View options
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

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