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SN74HCS595-Q1

ACTIVE

Automotive 8-bit shift register with Schmitt-trigger inputs and 3-state output registers

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Data sheet
Automotive 8-bit shift register with Schmitt-trigger inputs and 3-state output registers

SN74HCS595-Q1

ACTIVE
Data sheet Order now

Product details

Configuration Serial-in, Parallel-out Bits (#) 8 Technology Family HCS Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Input type Schmitt-Trigger Output type 3-State Clock Frequency (MHz) 75 IOL (Max) (mA) 7.8 IOH (Max) (mA) -7.8 ICC (Max) (uA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode, Output register
Configuration Serial-in, Parallel-out Bits (#) 8 Technology Family HCS Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Input type Schmitt-Trigger Output type 3-State Clock Frequency (MHz) 75 IOL (Max) (mA) 7.8 IOH (Max) (mA) -7.8 ICC (Max) (uA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode, Output register
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SOIC (D) 16 59 mm² 9.9 x 6 SOT-23-THN (DYY) 16 8 mm² 4.2 x 2 TSSOP (PW) 16 22 mm² 5 x 4.4 WQFN (BQB) 16 9 mm² 3.5 x 2.5
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  • AEC-Q100 qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • Available in wettable flank QFN (WBQB) package
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • AEC-Q100 qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • Available in wettable flank QFN (WBQB) package
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
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The SN74HCS595-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-trigger architecture, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of the OE input.

The SN74HCS595-Q1 device contains an 8-bit, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. All inputs include Schmitt-trigger architecture, eliminating any erroneous data outputs due to slow-edged or noisy input signals. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and a serial output (QH’) for cascading. When the output-enable (OE) input is high, the storage register outputs are in a high-impedance state. Internal register data and serial output (QH’) are not impacted by the operation of the OE input.

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SN74HCS595 ACTIVE 8-bit shift register with Schmitt-trigger inputs and 3-state output registers Exact equivalent part in commercial grade

Technical documentation

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Type Title Date
* Data sheet SN74HCS595-Q1 Automotive 8-Bit Shift Register With Schmitt-Trigger Inputs and 3-State Output Registers datasheet (Rev. F) 16 Dec 2021
Application note Increase the Number of Outputs on a Microcontroller 27 Oct 2020
Application note Driving Indicator LEDs 15 Oct 2020
Application note Reduce Noise and Save Power with the New HCS Logic Family (Rev. A) 20 Apr 2020
Technical article New logic family enables noise-tolerant and lower-power system designs 12 Nov 2019

Design & development

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Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

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Evaluation board

14-24-NL-LOGIC-EVM — Generic 14 through 24 pin non-leaded package evaluation module

Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
document-pdfAcrobat User guide
In stock
Limit: 10
Simulation model

SN74HCS595 IBIS Model (Rev. C)

SCLM163C.ZIP (253 KB) - IBIS Model
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Package Pins Download
SOIC (D) 16 View options
SOT-23-THIN (DYY) 16 View options
TSSOP (PW) 16 View options
WQFN (BQB) 16 View options

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