SN74HCS74-Q1

ACTIVE

Automotive Schmitt-trigger input dual D-type positive-edge-triggered flip-flops w/ clear and preset

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Automotive Schmitt-trigger input dual D-type positive-edge-triggered flip-flops w/ clear and preset

SN74HCS74-Q1

ACTIVE

Product details

Parameters

Channels (#) 2 Technology Family HCS VCC (Min) (V) 2 VCC (Max) (V) 6 Input type Schmitt-Trigger Output type Push-Pull Clock Frequency (Max) (MHz) 45 IOL (Max) (mA) 7.8 IOH (Max) (mA) -7.8 ICC (Max) (uA) 2 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode open-in-new Find other D-type flip-flop

Package | Pins | Size

SOIC (D) 14 52 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 open-in-new Find other D-type flip-flop

Features

  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V

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open-in-new Find other D-type flip-flop

Description

The device contains two independent D-type positive-edge-triggered flip-flops. All inputs include Schmitt triggers, allowing for slow or noisy input signals. A low level at the preset ( PRE) input sets the output high. A low level at the clear ( CLR) input resets the output low. Preset and clear functions are asynchronous and not dependent on the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs (Q, Q) on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the input clock (CLK) signal. Following the hold-time interval, data at the data (D) input can be changed without affecting the levels at the outputs (Q, Q).

open-in-new Find other D-type flip-flop
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Information

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Preproduction samples are available (PSN74HCS74QBQARQ1). Request now

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SN74HCS74 ACTIVE Schmitt-trigger input dual D-type positive-edge-triggered flip-flops w/ clear and preset Exact equivalent part in commercial grade

Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet SN74HCS74-Q1 Automotive Qualified Schmitt-Trigger Input Dual D-Type Flip-Flops datasheet (Rev. C) Nov. 23, 2020
Application note Reduce Noise and Save Power with the New HCS Logic Family (Rev. A) Apr. 20, 2020
User guide 14-24-Logic-EVM User's Guide Oct. 04, 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
EVALUATION BOARD Download
20
Description
Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic and translation devices with included dual supply support
  • Board has 9 sections that can be broken apart for a smaller form factor

Design tools & simulation

SIMULATION MODEL Download
SCEM590A.ZIP (51 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
(BQA) 14 View options
SOIC (D) 14 View options
TSSOP (PW) 14 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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