SN74LS165A Serial-out shift registers | TI.com

SN74LS165A
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Serial-out shift registers

Serial-out shift registers - SN74LS165A
Datasheet
 

Description

The ’165 and ’LS165A are 8-bit serial shift registers that shift the data in the direction of QA toward QH when clocked. Parallel-in access to each stage is made available by eight individual, direct data inputs that are enabled by a low level at the shift/load (SH/LD\) input. These registers also feature gated clock (CLK) inputs and complementary outputs from the eighth bit. All inputs are diode-clamped to minimize transmission-line effects, thereby simplifying system design.

Clocking is accomplished through a two-input positive-NOR gate, permitting one input to be used as a clock-inhibit function. Holding either of the clock inputs high inhibits clocking, and holding either clock input low with SH/LD\ high enables the other clock input. Clock inhibit (CLK INH) should be changed to the high level only while CLK is high. Parallel loading is inhibited as long as SH/LD\ is high. Data at the parallel inputs are loaded directly into the register while SH/LD\ is low, independently of the levels of CLK, CLK INH, or serial (SER) inputs.

Features

  • Complementary Outputs
  • Direct Overriding Load (Data) Inputs
  • Gated Clock Inputs
  • Parallel-to-Serial Data Conversion

The SN54165 and SN74165 devices are obsolete and are no longer supplied.

Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Voltage (Nom) (V) F @ nom voltage (Max) (MHz) ICC @ nom voltage (Max) (mA) tpd @ nom Voltage (Max) (ns) IOL (Max) (mA) IOH (Max) (mA) 3-state output Rating Operating temperature range (C)
SN74LS165A Order now LS     4.75     5.25     5     35     30     25     8     -0.4     No     Catalog     0 to 70    
SN54LS165A Samples not available LS     4.75     5.25     5     35     30     25     8     -0.4     No     Military     -55 to 125