Each of these monolithic circuits contains eight masterslave flipflops and additional gating to implement two individual fourbit counters in a single package. The '390 and 'LS390 incorporate dual dividebytwo and dividebyfive counters, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divideby100. When connected as a biquinary counter, the separate dividebytwo circuit can be used to provide symmetry (a square wave) at the final output stage. The '393 and 'LS393 each comprise two independent fourbit binary counters each having a clear and a clock input. Nbit binary counters can be implemented with each package providing the capability of divideby256. The '390, 'LS390, '393, and 'LS393 have parallel outputs from each counter stage so that any submultiple of the input count frequency is available for systemtiming signals. Series 54 and Series 54LS circuits are characterized for operation over the full military temperature range of 55°C to 125°C; Series 74 and Series 74LS circuits are characterized for operation from 0°C to 70°C.
Part number  Order  Technology Family  VCC (Min) (V)  VCC (Max) (V)  Bits (#)  Voltage (Nom) (V)  F @ nom voltage (Max) (MHz)  ICC @ nom voltage (Max) (mA)  tpd @ nom Voltage (Max) (ns)  IOL (Max) (mA)  IOH (Max) (mA)  Function  Type  Rating  Operating temperature range (C)  Package Group 

SN74LS390 

LS  4.75  5.25  4  5  35  26  60  8  0.4  Counter  Decade  Catalog  0 to 70 
PDIP  16
SOIC  16 SO  16 
SN54LS390  Samples not available  LS  4.75  5.25  4  5  35  26  60  8  0.4  Counter  Decade  Military  55 to 125 
CDIP  16
CFP  16 LCCC  20 