Each of these monolithic counters contains four masterslave flipflops and additional gating to provide a dividebytwo counter and a threestage binary counter for which the count cycle length is dividebyfive for the '90A and 'LS90, dividebysix for the '92A and 'LS92, and the divideby eight for the '93A and 'LS93.
All of these counters have a gated zero reset and the '90A and 'LS90 also have gated settonine inputs for use in BCD nine's complement applications.
To use their maximum count length (decade, dividebytwelve, or fourbit binary) of these counters, the CKB input is connected to the Q_{A} output. The input count pulses are applied to CKA input and the outputs are as described in the appropriate function table. A symmetrical dividebyten count can be obtained from the '90A or 'LS90 counters by connecting the Q_{D} output to the CKA input and applying the input count to the CKB input which gives a dividebyten square wave at output Q_{A}.
TYPES  TYPICAL POWER DISSIPATION 

'90A  145 mW 
'92A, '93A  130 mW 
'LS90, 'LS92, 'LS93  45 mW 
Part number  Order  Technology Family  VCC (Min) (V)  VCC (Max) (V)  Bits (#)  Voltage (Nom) (V)  F @ nom voltage (Max) (MHz)  ICC @ nom voltage (Max) (mA)  tpd @ nom Voltage (Max) (ns)  IOL (Max) (mA)  IOH (Max) (mA)  Function  Type  Rating  Operating temperature range (C)  Package Group 

SN74LS90 

LS  4.75  5.25  4  5  35  15  50  8  0.4  Counter  Decade  Catalog  0 to 70 
PDIP  14
SOIC  14 SO  14 
SN54LS90  Samples not available  LS  4.75  5.25  4  5  35  15  50  8  0.4  Counter  Decade  Military  55 to 125  CDIP  14 