5-V, 2:1 (SPDT), 3-channel analog switch
Product details
Parameters
Package | Pins | Size
Features
- 2-V to 5.5-V VCC Operation
- Support Mixed-Mode Voltage Operation on All Ports
- High On-Off Output-Voltage Ratio
- Low Crosstalk Between Switches
- Individual Switch Controls
- Extremely Low Input Current
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Description
These triple 2-channel CMOS analog multiplexers/demultiplexers are designed for 2-V to 5.5-V VCC operation.
The LV4053A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | SN54LV4053A, SN74LV4053A datasheet (Rev. K) | Apr. 05, 2005 |
Application note | Selecting the Right Texas Instruments Signal Switch (Rev. B) | Apr. 02, 2020 | |
Application note | Multiplexers and Signal Switches Glossary | Mar. 06, 2020 | |
Technical articles | Achieving highly accurate full-scale charge and discharge current control for high-cell Li-ion battery-formation testing | Aug. 13, 2018 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
Features
- Quick testing of TI's leaded surface mount packages
- Allows leaded suface mount packages to be plugged into 100mil spaced bread board
- Supports TI's 8 most popular leaded packages with a single panel
Description
Features
- Quick testing of TI's surface mount packages
- Allows suface mount packages to be plugged into 100mil spaced bread board
- Supports TI's 16 most popular leadless packages with a single panel
Design tools & simulation
Reference designs
Design files
-
download PMP15043 Assembly Drawing (Rev. A).pdf (183KB) -
download PMP15043 BOM (Rev. A).pdf (37KB) -
download PMP15043 CAD Files (Rev. A).zip (619KB) -
download PMP15043 Gerber (Rev. A).zip (184KB) -
download PMP15043 PCB (Rev. A).pdf (882KB)
Design files
-
download PMP15038 BOM.pdf (31KB) -
download PMP15038 Assembly Drawing.pdf (126KB) -
download PMP15038 PCB.pdf (472KB) -
download PMP15038 CAD Files.zip (465KB) -
download PMP15038 Gerber.zip (248KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
PDIP (N) | 16 | View options |
SO (NS) | 16 | View options |
SOIC (D) | 16 | View options |
SSOP (DB) | 16 | View options |
TSSOP (PW) | 16 | View options |
TVSOP (DGV) | 16 | View options |
VQFN (RGY) | 16 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
TI E2E™ forums with technical support from TI engineers
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