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SN74LV4053A

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5-V, 2:1 (SPDT), 3-channel analog switch

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Data sheet

SN74LV4053A

ACTIVE
Data sheet Order now

Product details

Configuration 2:1 SPDT Number of channels (#) 3 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (Typ) (Ohms) 23 CON (Typ) (pF) 5.6 ON-state leakage current (Max) (µA) 1 Bandwidth (MHz) 50 Operating temperature range (C) -40 to 85 Input/output continuous current (Max) (mA) 25 Rating Catalog
Configuration 2:1 SPDT Number of channels (#) 3 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Protocols Analog Ron (Typ) (Ohms) 23 CON (Typ) (pF) 5.6 ON-state leakage current (Max) (µA) 1 Bandwidth (MHz) 50 Operating temperature range (C) -40 to 85 Input/output continuous current (Max) (mA) 25 Rating Catalog
PDIP (N) 16 181 mm² 19.3 x 9.4 SOIC (D) 16 59 mm² 9.9 x 6 SOP (NS) 16 80 mm² 10.2 x 7.8 SSOP (DB) 16 33 mm² 5.3 x 6.2 TSSOP (PW) 16 22 mm² 5 x 4.4 TSSOP (PW) 16 22 mm² 4.4 x 5 TVSOP (DGV) 16 23 mm² 3.6 x 6.4 VQFN (RGY) 16 14 mm² 4 x 3.5
  • 2-V to 5.5-V VCC Operation
  • Support Mixed-Mode Voltage Operation on All Ports
  • High On-Off Output-Voltage Ratio
  • Low Crosstalk Between Switches
  • Individual Switch Controls
  • Extremely Low Input Current
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • 2-V to 5.5-V VCC Operation
  • Support Mixed-Mode Voltage Operation on All Ports
  • High On-Off Output-Voltage Ratio
  • Low Crosstalk Between Switches
  • Individual Switch Controls
  • Extremely Low Input Current
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

These triple 2-channel CMOS analog multiplexers/demultiplexers are designed for 2-V to 5.5-V VCC operation.

The ’LV4053A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

These triple 2-channel CMOS analog multiplexers/demultiplexers are designed for 2-V to 5.5-V VCC operation.

The ’LV4053A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
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Technical documentation

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Type Title Date
* Data sheet SN54LV4053A, SN74LV4053A datasheet (Rev. K) 05 Apr 2005
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dec 2021
Technical article Achieving highly accurate full-scale charge and discharge current control for high-cell Li-ion battery-formation testing 13 Aug 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Interface adapter

LEADED-ADAPTER1 — Surface mount to DIP header adapter for quick testing of TI's 5, 8, 10, 16 & 24-pin leaded packages

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Not available on TI.com
Interface adapter

LEADLESS-ADAPTER1 — Surface mount to DIP header adapter for testing of TI's 6,8,10,12,14,16, & 20-pin leadless packages

The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
Not available on TI.com
Simulation model

SN74LV4053A IBIS Model SN74LV4053A IBIS Model

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Reference designs

PMP15043 — 6A, 0.05% Current Accuracy Power Solution for Battery Test Systems Reference Design

This reference design circuit introduces a highly accurate, bi-directional current power solution used in battery test systems (BTS). The maximum current capability is 6A with lower than 0.05% full scale accuracy. Controlling through a logic pin, the circuit can be used to charge or discharge a (...)
document-pdfAcrobat Schematic
Reference designs

PMP15038 — 50A, 0.05% Current Accuracy Power Reference Design for Battery Test Systems

This reference design introduces a large current, highly accurate and bi-directional power solution used in battery test systems (BTS). It includes a LM5170EVM-BIDIR and a signal control board. The LM5170EVM-BIDIR is an evaluation board  to showcase the high performance of the dual-channel (...)
document-pdfAcrobat Schematic
Package Pins Download
PDIP (N) 16 View options
SO (NS) 16 View options
SOIC (D) 16 View options
SSOP (DB) 16 View options
TSSOP (PW) 16 View options
TVSOP (DGV) 16 View options
VQFN (RGY) 16 View options

Ordering & quality

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  • MSL rating/Peak reflow
  • MTBF/FIT estimates
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  • Qualification summary
  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

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