SN74LV595A

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8-Bit Shift Registers With 3-State Output Registers

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Product details

Parameters

Bits (#) 8 Technology Family LV-A VCC (Min) (V) 2 VCC (Max) (V) 5.5 Input type CMOS Output type CMOS IOL (Max) (mA) 50 IOH (Max) (mA) -50 open-in-new Find other Shift register

Package | Pins | Size

SOIC (D) 16 59 mm² 9.9 x 6 SOP (NS) 16 80 mm² 10.2 x 7.8 TSSOP (PW) 16 22 mm² 4.4 x 5 TSSOP (PW) 16 22 mm² 5 x 4.4 VQFN (RGY) 16 14 mm² 4 x 3.5 open-in-new Find other Shift register

Features

  • 2-V to 5.5-V VCC Operation
  • Max tpd of 7.1 ns at 5 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Support Mixed-Mode Voltage Operation on All
    Ports
  • 8-Bit Serial-In, Parallel-Out Shift
  • Ioff Supports Live Insertion, Partial Power-Down
    Mode, and Back-Drive Protection
  • Shift Register Has Direct Clear
  • Latch-Up Performance Exceeds 250 mA Per
    JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model
    • 200-V Machine Model
    • 1000-V Charged-Device Model
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Description

The SN74LV595A device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet SN74LV595A 8-Bit Shift Registers With 3-State Output Registers datasheet (Rev. Q) Apr. 06, 2016
Application note Power-Up Behavior of Clocked Devices (Rev. A) Feb. 06, 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
EVALUATION BOARD Download
20
Description
Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic and translation devices with included dual supply support
  • Board has 9 sections that can be broken apart for a smaller form factor

Design tools & simulation

SIMULATION MODEL Download
SCEM148B.ZIP (28 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
SO (NS) 16 View options
SOIC (D) 16 View options
TSSOP (PW) 16 View options
VQFN (RGY) 16 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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