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SN74LVC1G32

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Single 2-Input Positive-OR Gate

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Single 2-Input Positive-OR Gate

SN74LVC1G32

ACTIVE
Data sheet Order now

Product details

Parameters

Technology Family LVC VCC (Min) (V) 1.65 VCC (Max) (V) 5.5 Channels (#) 1 Inputs per channel 2 IOL (Max) (mA) 32 IOH (Max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Partial Power Down (Ioff), Over-Voltage Tolerant Inputs, Ultra High Speed (tpd <5ns) Data rate (Max) (Mbps) 100 Rating Catalog Operating temperature range (C) -40 to 125, -40 to 85 open-in-new Find other OR gate

Package | Pins | Size

DSBGA (YZP) 5 2 mm² .928 x 1.428 SOT-23 (DBV) 5 5 mm² 2.9 x 1.6 SOT-23 (DBV) 5 5 mm² 2.926 x 1.626 SOT-5X3 (DRL) 5 3 mm² 1.6 x 1.6 SOT-SC70 (DCK) 5 4 mm² 2 x 2.1 USON (DRY) 6 1 mm² 1.5 x 1 X2SON (DPW) 5 1 mm² .8 x .8 X2SON (DSF) 6 1 mm² 1 x 1 open-in-new Find other OR gate

Features

  • Available in the Ultra-Small 0.64 mm2
    Package (DPW) with 0.5-mm Pitch
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5-V
  • Supports Down Translation to VCC
  • Max tpd of 3.6 ns at 3.3-V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3-V
  • Ioff Supports Live Insertion, Partial-Power-Down
    Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
 open-in-new Find other OR gate

Description

This single 2-input positive-OR gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G32 device performs the Boolean function Y = A + B or Y = A\ + B\ in positive logic.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G32 device is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 × 0.8 mm.

 open-in-new Find other OR gate
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Technical documentation

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Type Title Date
* Datasheet SN74LVC1G32 Single 2-Input Positive-OR Gate datasheet (Rev. V) Mar. 22, 2016
Technical articles How to keep your motor running safely Jun. 04, 2020
Selection guides Little Logic Guide 2018 (Rev. G) Jul. 06, 2018
Application notes Designing and Manufacturing with TI's X2SON Packages Aug. 23, 2017
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes How to Select Little Logic (Rev. A) Jul. 26, 2016
Application notes Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
Solution guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
More literature Design Summary for WCSP Little Logic (Rev. B) Nov. 04, 2004
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
Application notes Selecting the Right Level Translation Solution (Rev. A) Jun. 22, 2004
User guides Signal Switch Data Book (Rev. A) Nov. 14, 2003
Application notes Use of the CMOS Unbuffered Inverter in Oscillator Circuits Nov. 06, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
User guides LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) Dec. 18, 2002
Application notes Texas Instruments Little Logic Application Report Nov. 01, 2002
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards Jun. 13, 2002
Application notes 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) May 22, 2002
Application notes Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices May 10, 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS Mar. 27, 2002
More literature Military Low Voltage Solutions Apr. 04, 2001
Application notes Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices Dec. 01, 1997
Application notes Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) Aug. 01, 1997
Application notes CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application notes LVC Characterization Information Dec. 01, 1996
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996
User guides Low-Voltage Logic (LVC) Designer's Guide Sep. 01, 1996
Application notes Understanding Advanced Bus-Interface Products Design Guide May 01, 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$10.00
Description
Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
View details
EVALUATION BOARDS Download
document-generic User guide
Description

The DM38x Digital Video Evaluation Module (DVEVM) enables developers to start immediate evaluation of the DM38x Digital Media Processors and begin building digital video applications such as IP security cameras, action cameras, drones, video doorbells, car digital video recorders and other digital (...)

Features
  • DM388 digital media processor-based development board with 2Gb DDR3
  • Video capture and output of NTSC or PAL signals via component I/O
  • HDMI video output
  • CSI2 and parallel camera input
  • PCIe, SATA 2x, ethernet 2x, USB x2, audio, SD-card slot
View details

Design tools & simulation

SIMULATION MODELS Download
SCEJ254.ZIP (87 KB) - HSpice Model
SIMULATION MODELS Download
SCEM168C.ZIP (43 KB) - IBIS Model
SIMULATION MODELS Download
SCEM632.ZIP (7 KB) - PSpice Model

Reference designs

REFERENCE DESIGNS Download
High-efficiency, low-emission, isolated DC/DC converter-based analog input module reference design
TIDA-010065 — This reference design is a simplified architecture for generating an isolated power supply for isolated amplifiers for measuring isolated voltages and currents. A fully integrated DC/DC converter with reinforced isolation operating from a 5-V input with configurable 5-V or 5.4-V output (headroom for (...)
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Three-phase inverter reference design for 200-480 VAC drives with opto-emulated input gate drivers
TIDA-010025 — This reference design realizes a reinforced isolated three-phase inverter subsystem using isolated IGBT gate drivers and isolated current/voltage sensors. The UCC23513 gate driver used has a 6-pin wide body package with optical LED emulated inputs which enables its use as pin-to-pin replacement to (...)
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REFERENCE DESIGNS Download
Reference design for reinforced isolation 3-phase inverter with current, voltage and temp protection
TIDA-00366 — This design provides a reference solution for a three-phase inverter rated up to 10kW, designed using the reinforced isolated gate driver UCC21530, reinforced isolated amplifiers AMC1301 and AMC1311, and MCU TMS320F28027. Lower system cost is achieved by using the AMC1301 to measure motor current (...)
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REFERENCE DESIGNS Download
Camera Reference Design for ARM® Cortex®-M Microcontrollers (MCUs)
TIDM-TM4C129CAMERA — This design implements a network camera with a QVGA display panel and an embedded web server for remote monitoring.  With a memory footrpint of 250KB for the web server, there is ample memory available on the TM4C129x microcontroller for additional customizations.
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REFERENCE DESIGNS Download
Acontis EtherCAT Master Stack Reference Design
TIDEP0043 — The acontis EC-Master EtherCAT Master stack is a highly portable software stack that can be used on various embedded platforms. The EC-Master supports the high performance TI Sitara MPUs,  it provides a sophisticated EtherCAT Master solution which customers can use to implement EtherCAT (...)
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REFERENCE DESIGNS Download
IR Filter Analog Controller Reference Design
TIDA-01165 — Reference design TIDA-01165 is an analog controller for IR Filters.  This design highlights the DRV8837C motor driver used to open and close an Infrared Filter when the module is exposed to high intensity sunlight.  The simplified layout is suited to cost-conscious applications while also (...)
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REFERENCE DESIGNS Download
Parallel Redundancy Protocol (PRP) Ethernet Reference Design for Substation Automation
TIDEP0054 — This TI Design implements a solution for high-reliability, low-latency network communications for substation automation equipment in Smart Grid transmission and distribution networks. It supports the Parallel Redundancy Protocol (PRP) specification in the IEC 62439 standard using the PRU-ICSS. This (...)
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REFERENCE DESIGNS Download
Reference Design using TMS320C6657 to Implement Efficient OPUS Codec Solution
TIDEP0036 — The TIDEP0036 reference design provides an example of the ease of running TI optimized Opus encoder/decoder on the TMS320C6657 device. Since Opus supports a a wide range of bit rates, frame sizes and sampling rates, all with low delay, it has applicability for voice communications, networked audio (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
DSBGA (YZP) 5 View options
SC70 (DCK) 5 View options
SON (DRY) 6 View options
SON (DSF) 6 View options
SOT-23 (DBV) 5 View options
SOT-5X3 (DRL) 5 View options
X2SON (DPW) 5 View options

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Training series

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Videos

Anatomy of a logic part number

Logic part numbers use a formulaic naming system to denote the device's functionality and features. This video reviews the components to a logic part's name.

Posted: 22-Jan-2018
Duration: 01:26

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