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SN74LVC1G332

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Single 3-Input Positive-OR Gate

Data sheet
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Single 3-Input Positive-OR Gate

SN74LVC1G332

ACTIVE
Data sheet Order now

Product details

Parameters

Technology Family LVC VCC (Min) (V) 1.65 VCC (Max) (V) 5.5 Channels (#) 1 Inputs per channel 3 IOL (Max) (mA) 32 IOH (Max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Partial Power Down (Ioff), Over-Voltage Tolerant Inputs, Ultra High Speed (tpd <5ns) Data rate (Max) (Mbps) 100 Rating Catalog Operating temperature range (C) -40 to 125, -40 to 85 open-in-new Find other OR gate

Package | Pins | Size

DSBGA (YZP) 6 2 mm² .928 x 1.428 SOT-23 (DBV) 6 5 mm² 2.9 x 1.6 SOT-5X3 (DRL) 6 2 mm² 1.65 x 1.2 SOT-SC70 (DCK) 6 4 mm² 2 x 2.1 USON (DRY) 6 1 mm² 1.5 x 1 X2SON (DSF) 6 1 mm² 1 x 1 open-in-new Find other OR gate

Features

  • Available in the Texas Instruments NanoStar and NanoFree Packages
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Supports Down Translation to VCC
  • Max tpd of 4.5 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

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Description

The SN74LVC1G332 device performs the Boolean function in positive logic.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet SN74LVC1G332 datasheet (Rev. E) Jan. 11, 2012
Technical articles How to keep your motor running safely Jun. 04, 2020
Selection guide Little Logic Guide 2018 (Rev. G) Jul. 06, 2018
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note How to Select Little Logic (Rev. A) Jul. 26, 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
More literature Design Summary for WCSP Little Logic (Rev. B) Nov. 04, 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
Application note Selecting the Right Level Translation Solution (Rev. A) Jun. 22, 2004
User guide Signal Switch Data Book (Rev. A) Nov. 14, 2003
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits Nov. 06, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) Dec. 18, 2002
Application note Texas Instruments Little Logic Application Report Nov. 01, 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards Jun. 13, 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) May 22, 2002
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices May 10, 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS Mar. 27, 2002
More literature Military Low Voltage Solutions Apr. 04, 2001
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices Dec. 01, 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) Aug. 01, 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application note LVC Characterization Information Dec. 01, 1996
Application note Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application note Live Insertion Oct. 01, 1996
User guide Low-Voltage Logic (LVC) Designer's Guide Sep. 01, 1996
Application note Understanding Advanced Bus-Interface Products Design Guide May 01, 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
10
Description
Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
View details

Design tools & simulation

SIMULATION MODEL Download
SCEM371A.ZIP (44 KB) - IBIS Model
SIMULATION MODEL Download
SCEM631.ZIP (8 KB) - PSpice Model

Reference designs

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TIDM-SERVODRIVE — The DesignDRIVE Development Kit is a reference design for a complete industrial drive directly connecting to a three phase ACI or PMSM motor. Many drive topologies can be created from the combined control, power and communications technologies included on this single platform.  Includes (...)
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4-20mA Analog Input Module Reference Design for Safety Applications
TIDA-00548 — The TIDA-00548 design is an isolated dual-channel 4- to 20-mA analog input reference design, which can be used as a sub-part for functional safety programmable logic controllers (PLC). This reference design delivers digitized input values using a 32-bit high-performance analog-to-digital converter (...)
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8 Channel, 2-A High-Side Driver Reference Design for Digital Output Modules
TIDA-01552 — This eight-channel, parallel, 2-A, high-side, digital output reference design for factory automation applications like PLCs shows the diagnostic features and the power density of new Texas Instruments high-side driver components (such as TPS27S100). Each output can individually measure the output (...)
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8-ch Isolated High Voltage Analog Input Module with ISOW7841 Reference Design
TIDA-01333 — The TIDA-01333 isolated high voltage analog input module reference design has eight channels supporting both, voltage and current measurement. In addition, 4 channels support common-mode voltages up to ±160V. Isolation of +5V line and the Serial Peripheral Interface  (SPI) communication (...)
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Dual Channel-to-Channel Isolated Universal Analog Input Module for PLC Reference Design
TIDA-00550 — The TIDA-00550, dual channel-to-channel isolated universal analog input module reference design for programmable logic controllers (PLC), combines precision and flexibility. This TI Design used in conjunction with sensor transmitters can measure standard input voltages and currents as well as (...)
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REFERENCE DESIGNS Download
16-channel Status LED Driver for PLC Modules Reference Design
TIDA-00560 — The objective of the TIDA-00560 TI Design is to demonstrate a multi-channel LED driver as required in PLC I/O modules to indicate the status of several analog, digital input, and output channels. Important requirements for such a design like low static current, low component count, minimal PCB (...)
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REFERENCE DESIGNS Download
8-ch Isolated High Voltage Analog Input Module Reference Design
TIDA-00764 — The TIDA-00764 reference design is a high voltage analog input module with eight channels. Each channel can be used for both, voltage and current measurement. The TI Design uses the 16-bit analog-to-digital converter (ADC) ADS8681 that can handle input voltage of up to ±12.288V. This make any (...)
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REFERENCE DESIGNS Download
Thermal Printing with the PRU-ICSS on the BeagleBone Black Reference Design
TIDEP0056 — The Programmable Realtime Unit – Industrial Communications Sub-System (PRU-ICSS) is a versatile component of the AM335x SoC that enables real-time, deterministic, fast GPIO control, even when running a non-deterministic operating system. This reference design provides a concrete use case and (...)
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CAD/CAE symbols

Package Pins Download
DSBGA (YZP) 6 View options
SC70 (DCK) 6 View options
SON (DRY) 6 View options
SON (DSF) 6 View options
SOT-23 (DBV) 6 View options
SOT-5X3 (DRL) 6 View options

Ordering & quality

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  • REACH
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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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