SN74LVC1G57

Package | Pins | Size

DSBGA (YZP)

6

2 mm² .928 x 1.428

SOT-23 (DBV)

6

5 mm² 2.9 x 1.6

SOT-5X3 (DRL)

6

2 mm² 1.65 x 1.2

SOT-SC70 (DCK)

6

4 mm² 2 x 2.1

USON (DRY)

6

1 mm² 1.5 x 1

X2SON (DSF)

6

1 mm² 1 x 1

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Features

Supports 5-V V_CC Operation
Inputs Accept Voltages to 5.5 V
- Supports Down Translation to V_CC
Max t_pd of 6.3 ns at 3.3 V
Schmitt-Triggered Inputs
Low Power Consumption, 10-µA Maximum I_CC
±24-mA Output Drive at 3.3 V
I_off Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
Available in the Texas Instruments NanoFree™ Package

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The SN74LVC1G57 device features configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XNOR, inverter, and buffer. All inputs can be connected to V_CC or GND.

This device functions as an independent gate, but because of Schmitt action, it may have different input threshold levels for positive-going (V_T+) and negative-going (V_T–) signals.

This configurable multiple-function gate is designed for 1.65-V to 5.5-V V_CC operation.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

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Generic logic EVM supporting 5 through 8 pin DCK, DCT, DCU, DRL, and DBV packages

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Technical documentation

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	Type	Title	Date
*	Datasheet	SN74LVC1G57 Configurable Multiple-Function Gate datasheet (Rev. P)	Nov. 29, 2016
	Technical articles	How to keep your motor running safely	Jun. 04, 2020
	Selection guides	Little Logic Guide 2018 (Rev. G)	Jul. 06, 2018
	Selection guides	Logic Guide (Rev. AB)	Jun. 12, 2017
	Application notes	How to Select Little Logic (Rev. A)	Jul. 26, 2016
	Application notes	Implications of Slow or Floating CMOS Inputs (Rev. D)	Jun. 23, 2016
	Application notes	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	Dec. 02, 2015
	Application notes	Understanding Schmitt Triggers	Sep. 21, 2011
	User guides	LOGIC Pocket Data Book (Rev. B)	Jan. 16, 2007
	More literature	Design Summary for WCSP Little Logic (Rev. B)	Nov. 04, 2004
	Application notes	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	Jul. 08, 2004
	Application notes	Selecting the Right Level Translation Solution (Rev. A)	Jun. 22, 2004
	User guides	Signal Switch Data Book (Rev. A)	Nov. 14, 2003
	Application notes	Use of the CMOS Unbuffered Inverter in Oscillator Circuits	Nov. 06, 2003
	More literature	Logic Cross-Reference (Rev. A)	Oct. 07, 2003
	User guides	LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)	Dec. 18, 2002
	Application notes	Texas Instruments Little Logic Application Report	Nov. 01, 2002
	Application notes	TI IBIS File Creation, Validation, and Distribution Processes	Aug. 29, 2002
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards	Jun. 13, 2002
	Application notes	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)	May 22, 2002
	Application notes	Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices	May 10, 2002
	More literature	STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS	Mar. 27, 2002
	More literature	Military Low Voltage Solutions	Apr. 04, 2001
	Application notes	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices	Dec. 01, 1997
	Application notes	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)	Aug. 01, 1997
	Application notes	CMOS Power Consumption and CPD Calculation (Rev. B)	Jun. 01, 1997
	Application notes	LVC Characterization Information	Dec. 01, 1996
	Application notes	Input and Output Characteristics of Digital Integrated Circuits	Oct. 01, 1996
	Application notes	Live Insertion	Oct. 01, 1996
	User guides	Low-Voltage Logic (LVC) Designer's Guide	Sep. 01, 1996
	Application notes	Understanding Advanced Bus-Interface Products Design Guide	May 01, 1996

Design & development

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Hardware development

EVALUATION BOARDS Download

5-8-LOGIC-EVM

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10

Description

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.

Features

Board design allows for versatility in evaluation
Supports a wide-range of logic devices

SN74LVC1G57 IBIS Model (Rev. A)

Design tools & simulation

SIMULATION MODELS Download

SCEM292A.ZIP (44 KB) - IBIS Model

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Reference designs

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REFERENCE DESIGNS Download

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