Product details

Configuration 1:1 SPST Number of channels 3 Power supply voltage - single (V) 0.8, 1.2, 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 3.5 CON (typ) (pF) 10.5 ON-state leakage current (max) (µA) 5 Supply current (typ) (µA) 0.07 Bandwidth (MHz) 100 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 5 Supply voltage (max) (V) 5
Configuration 1:1 SPST Number of channels 3 Power supply voltage - single (V) 0.8, 1.2, 1.8, 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 3.5 CON (typ) (pF) 10.5 ON-state leakage current (max) (µA) 5 Supply current (typ) (µA) 0.07 Bandwidth (MHz) 100 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 64 Rating Catalog Drain supply voltage (max) (V) 5 Supply voltage (max) (V) 5
SSOP (DCT) 8 11.8 mm² 2.95 x 4 VSSOP (DCU) 8 6.2 mm² 2 x 3.1
  • Designed to be used in voltage-limiting applications
  • 3.5-ω on-state connection between ports A and B
  • Flow-through pinout for ease of printed circuit board trace routing
  • Direct interface with GTL+ levels
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22:
    • 2000-V Human-Body Model
    • 200-V Machine Model
    • 1000-V Charged-Device Model
  • Designed to be used in voltage-limiting applications
  • 3.5-ω on-state connection between ports A and B
  • Flow-through pinout for ease of printed circuit board trace routing
  • Direct interface with GTL+ levels
  • Latch-up performance exceeds 100 mA per JESD 78, class II
  • ESD protection exceeds JESD 22:
    • 2000-V Human-Body Model
    • 200-V Machine Model
    • 1000-V Charged-Device Model

The SN74TVC3306 device provides three parallel NMOS pass transistors with a common unbuffered gate. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device can be used as a dual switch, with the gates cascaded together to a reference transistor. The low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to protect components with inputs that are sensitive to high-state voltage-level overshoots.

The SN74TVC3306 device provides three parallel NMOS pass transistors with a common unbuffered gate. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device can be used as a dual switch, with the gates cascaded together to a reference transistor. The low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to protect components with inputs that are sensitive to high-state voltage-level overshoots.

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Technical documentation

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Type Title Date
* Data sheet SN74TVC3306 Dual Voltage Clamp datasheet (Rev. E) PDF | HTML 05 Sep 2023
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dec 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
More literature I2C and Serial Bus Devices Application Clip 10 Jul 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DIP-ADAPTER-EVM — DIP adapter evaluation module

Speed up your op amp prototyping and testing with the DIP adapter evaluation module (DIP-ADAPTER-EVM), which provides a fast, easy and inexpensive way to interface with small surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them (...)

User guide: PDF
Not available on TI.com
Interface adapter

LEADED-ADAPTER1 — Surface mount to DIP header adapter for quick testing of TI's 5, 8, 10, 16 & 24-pin leaded packages

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

User guide: PDF
Not available on TI.com
Simulation model

HSPICE Model of SN74TVC3306

SCEJ172.ZIP (81 KB) - HSpice Model
Simulation model

SN74TVC3306 IBIS Model (Rev. A)

SCDM002A.ZIP (35 KB) - IBIS Model
Package Pins Download
SSOP (DCT) 8 View options
VSSOP (DCU) 8 View options

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