The TL16C752CI-Q1 is a dual universal asynchronous receiver
transmitter (UART) with 64-byte FIFOs, automatic hardware and software flow control, and data rates
up to 3 Mbps. The device offers enhanced features. It has a transmission Character control register
(TCR) that stores received FIFO threshold level to start or stop transmission during hardware and
software flow control.
For all available packages, see the orderable addendum at the
end of the data sheet.
All trademarks are the property of their respective owners.
With the FIFO RDY register, the software gets the status of TXRDY or RXRDY for all two
ports in one access. On-chip status registers provide the user with error indications, operational
status, and modem interface control. System interrupts may be tailored to meet user requirements.
An internal loop-back capability allows onboard diagnostics. The TL16C752CI-Q1 incorporates the functionality of two UARTs, each UART having its own
register set and FIFOs. The two UARTs share only the data bus interface and clock source, otherwise
they operate independently. Another name for the UART function is asynchronous communications
element (ACE), and these terms are used interchangeably. The bulk of this document describes the
behavior of each ACE, with the understanding that two such devices are incorporated into the
TL16C752CI-Q1 device.
The TL16C752CI-Q1 is a dual universal asynchronous receiver
transmitter (UART) with 64-byte FIFOs, automatic hardware and software flow control, and data rates
up to 3 Mbps. The device offers enhanced features. It has a transmission Character control register
(TCR) that stores received FIFO threshold level to start or stop transmission during hardware and
software flow control.
For all available packages, see the orderable addendum at the
end of the data sheet.
All trademarks are the property of their respective owners.
With the FIFO RDY register, the software gets the status of TXRDY or RXRDY for all two
ports in one access. On-chip status registers provide the user with error indications, operational
status, and modem interface control. System interrupts may be tailored to meet user requirements.
An internal loop-back capability allows onboard diagnostics. The TL16C752CI-Q1 incorporates the functionality of two UARTs, each UART having its own
register set and FIFOs. The two UARTs share only the data bus interface and clock source, otherwise
they operate independently. Another name for the UART function is asynchronous communications
element (ACE), and these terms are used interchangeably. The bulk of this document describes the
behavior of each ACE, with the understanding that two such devices are incorporated into the
TL16C752CI-Q1 device.