DaVinci Digital Media Processor
Product details
Parameters
Package | Pins | Size
Features
- Highlights
- High-Performance Digital Media System-on-Chip (DMSoC)
- 432-MHz ARM926EJ-S Clock Rate
- Two Video Image Co-processors (HDVICP, MJCP) Engines
- Supports a Range of Encode, Decode and Video Quality Operations
- Video Processing Subsystem
- HW Face Detect Engine
- Resize Engine from 1/16x to 8x
- 16-Bit Parallel AFE (Analog Front-End) Interface Up to 120 MHz
- 4:2:2 (8-/16-bit) Interface
- 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output
- 3 DACs for HD Analog Video Output
- Hardware On-Screen Display (OSD)
- Capable of 1080p 30fps H.264 video processing
- Peripherals include EMAC, USB 2.0 OTG, DDR2/NAND, 5 SPIs, 2 UARTs, 2 MMC/SD/SDIO, Key Scan
- 8 Different Boot Modes and Configurable Power-Saving Modes
- Pin-to-pin and software compatible with DM365
- Extended temperature (-40°C - 85°C) available
- 3.3-V and 1.8-V I/O, 1.35-V Core
- 338-Pin Ball Grid Array at 65nm Process Technology
- High-Performance Digital Media System-on-Chip (DMSoC)
- 432-MHz ARM926EJ-S Clock Rate
- 4:2:2 (8-/16-Bit) Interface
- Capable of 1080p 30fps H.264 video processing
- Pin compatible with DM365 processors
- Fully Software-Compatible With ARM9™
- Extended temperature available for 432-Mhz device
- ARM926EJ-S™ Core
- Support for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets
- DSP Instruction Extensions and Single Cycle MAC
- ARM® Javelle® Technology
- Embedded ICE-RT Logic for Real-Time Debug
- ARM9 Memory Architecture
- 16K-Byte Instruction Cache
- 8K-Byte Data Cache
- 32K-Byte RAM
- 16K-Byte ROM
- Little Endian
- Two Video Image Co-processors (HDVICP, MJCP) Engines
- Support a Range of Encode and Decode Operations
- H.264, MPEG4, MPEG2, MJPEG, JPEG, WMV9/VC1
- Video Processing Subsystem
- Front End Provides:
- HW Face Detect Engine
- Hardware IPIPE for Real-Time Image Processing
- Resize Engine
- Resize Images From 1/16x to 8x
- Separate Horizontal/Vertical Control
- Two Simultaneous Output Paths
- Resize Engine
- IPIPE Interface (IPIPEIF)
- Image Sensor Interface (ISIF) and CMOS Imager Interface
- 16-Bit Parallel AFE (Analog Front End) Interface Up to 120 MHz
- Glueless Interface to Common Video Decoders
- BT.601/BT.656/BT.1120 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
- Histogram Module
- Lens distortion correction module (LDC)
- Back End Provides:
- Hardware On-Screen Display (OSD)
- Composite NTSC/PAL video encoder output
- 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output
- 3 DACs for HD Analog Video Output
- LCD Controller
- BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
- Front End Provides:
- Analog-to-Digital Convertor (ADC)
- Power Management and Real Time Clock Subsystem (PRTCSS)
- Real Time Clock
- 16-Bit Host-Port Interface (HPI)
- 10/100 Mb/s Ethernet Media Access Controller (EMAC) - Digital Media
- IEEE 802.3 Compliant
- Supports Media Independent Interface (MII)
- Management Data I/O (MDIO) Module
- Key Scan
- Voice Codec
- External Memory Interfaces (EMIFs)
- DDR2 and mDDR SDRAM 16-bit wide EMIF With 256 MByte Address Space (1.8-V I/O)
- Asynchronous16-/8-bit Wide EMIF (AEMIF)
- Flash Memory Interfaces
- NAND (8-/16-bit Wide Data)
- 16 MB NOR Flash, SRAM
- OneNAND(16-bit Wide Data)
- Flash Memory Interfaces
- Flash Card Interfaces
- Two Multimedia Card (MMC) / Secure Digital (SD/SDIO)
- SmartMedia/xD
- Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
- USB Port with Integrated 2.0 High-Speed PHY that Supports
- USB 2.0 High-Speed Device
- USB 2.0 High-Speed Host (mini-host, supporting one external device)
- USB On The Go (HS-USB OTG)
- Four 64-Bit General-Purpose Timers (each configurable as two 32-bit timers)
- One 64-Bit Watch Dog Timer
- Two UARTs (One fast UART with RTS and CTS Flow Control)
- Five Serial Port Interfaces (SPI) each with two Chip-Selects
- One Master/Slave Inter-Integrated Circuit(I2C) Bus™
- One Multi-Channel Buffered Serial Port (McBSP)
- I2S
- AC97 Audio Codec Interface
- S/PDIF via Software
- Standard Voice Codec Interface (AIC12)
- SPI Protocol (Master Mode Only)
- Direct Interface to T1/E1 Framers
- Time Division Multiplexed Mode (TDM)
- 128 Channel Mode
- Four Pulse Width Modulator (PWM) Outputs
- Four RTO (Real Time Out) Outputs
- Up to 104 General-Purpose I/O (GPIO) Pins (Multiplexed with Other Device Functions)
- Boot Modes
- On-Chip ARM ROM Bootloader (RBL) to Boot From NAND Flash, MMC/SD, UART, USB, SPI, EMAC, or HPI
- AEMIF (NOR and OneNAND)
- Configurable Power-Saving Modes
- Crystal or External Clock Input (typically 19.2 Mhz, 24 MHz, 27 Mhz or 36 MHz)
- Flexible PLL Clock Generators
- Debug Interface Support
- IEEE-1149.1 (JTAG™) Boundary-Scan-Compatible
- ETB (Embedded Trace Buffer) with 4K-Bytes Trace Buffer memory
- Device Revision ID Readable by ARM
- 338-Pin Ball Grid Array (BGA) Package (ZCE Suffix), 0.65-mm Ball Pitch
- 65nm Process Technology
- 3.3-V and 1.8-V I/O, 1.35-V Internal
- Community Reesources
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Description
Developers can now deliver crystal clear multi-format video at up to 1080p H.264 at 30fps (encode and closed-looped decode) in their digital video designs without concerns of video format support, constrained network bandwidth, limited system storage capacity or cost with the new TMS320DM368 DaVinci™ video processors from Texas Instruments Incorporated (TI).
The DM368 is capable of achieving HD video processing at 1080p 30fps H.264 and is completely pin-to-pin compatible with the DM365 processors, using the same ARM926EJ-S core running at 432 MHz. This ARM9-based DM368 device supports production-qualified H.264BP/MP/HP, MPEG-4, MPEG-2, MJPEG and VC1/WMV9 codecs providing customers with the flexibility to select the right video codec for their application. These codecs run on independent coprocessors (HDVICP and MJCP) offloading all compression needs from the main ARM core. This allows developers to obtain optimal performance from the ARM for their applications, including their multi-channel, multi-stream and multi-format needs.
Video surveillance designers achieve greater compression efficiency to provide more storage without straining the network bandwidth. Developers of media playback and camera-driven applications, such as video doorbells, digital signage, digital video recorders, portable media players and more can take advantage of the low power consumption and can ensure interoperability, as well as product scalability by taking advantage of the full suite of codecs supported on the DM368.
Along with multi-format HD video, the DM368 also features a suite of peripherals saving developers on system cost and complexity to enable a seamless interface to most additional external devices required for video applications. The image sensor interface is flexible enough to support CCD, CMOS, and various other interfaces such as BT.565, BT1120. The DM368 also offers a high level of integration with HD display support, including three built-in 10-bit HD analog video digital-to-analog converters (DACs), DDR2/mDDR, Ethernet MAC, USB 2.0, integrated audio, host port interface (HPI), analog-to digital converter and many more features saving developers on overall system costs, as well as real estate on their circuit boards allowing for a slimmer, sleeker design.
Support through a third party
This product does not have ongoing direct design support from TI. For support while working through your design, you may contact one of the following third parties: D3 Engineering, elnfochips, Ittiam Systems, Path Partner Technology, or Z3 Technologies.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The TMS320DM36x Digital Video Evaluation Module (DVEVM) enables developers to start immediate evaluation of TI’s Digital Media (DMx) processors and begin building digital video applications such as IP security cameras, action cameras, drones, wearables, digital signage, video doorbells, and (...)
Features
- TMS320DM368 Digital Media processor-based development board
- Parallel Camera Input compatible with Leopard Imaging LI-5M02 camera board
- Video capture of NTSC or PAL signals via component for HD and composite/S-Video for SD
- NTSC or PAL output via component for HD and composite/S-Video for SD
- Other (...)
Description
The XDS200 is a debug probe (emulator) used for debugging TI embedded devices. The XDS200 features a balance of low cost with good performance as compared to the low cost XDS110 and the high performance XDS560v2. It supports a wide variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a (...)
Features
The XDS200 is the mid-range family of JTAG debug probes (emulators) for TI processors. Designed to deliver good performance and the most common features that place it between the low cost XDS110 and the high performance XDS560v2, the XDS200 is the balanced solution to debug TI microcontrollers (...)
Description
The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).
All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)
Features
XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)
Description
The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).
All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)
Features
XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)
Software development
Features
The DM36x Linux DVSDK is a free non-commercial Linux that comes complete with everything a user needs to get started quickly and can be shipped in production systems. The Quick Start Guide should allow you to connect the hardware in a matter of minutes, and start playing with GUI based demos that (...)
Features
DM36x Codecs are optimized for use on TMS320DM365(tm) and TMS320DM368(tm) devices. For additional TI codecs, go to Codecs Current Inventory.
DM36x Codecs offer:
- Free, object code with production licensing
- LINUX and WINDOWS installers
- XDC packaged and validated on a standard EVM in a Codec Engine-based (...)
Design tools & simulation
Features
- Supports many TI processors including Sitara and Jacinto processors and DSPs
- Search by type of product, TI devices supported, or country
- Links and contacts for quick engagement
- Third-party companies located around the world
Reference designs
Design files
CAD/CAE symbols
| Package | Pins | Download |
|---|---|---|
| NFBGA (ZCE) | 338 | View options |
Ordering & quality
- RoHS
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- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
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