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Product details

Parameters

Number of switches 1 IEC 61000-4-2 contact (+/- kV) 15 IEC 61000-4-2 air-gap (+/- kV) 15 Interface USB 2.0, USB 3.0 Features Over Voltage Protection, Surge Protection Bi-/uni-directional Uni-Directional Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other Application-specific port protection ICs

Features

  • Overvoltage Protection at VBUS_CON Up to 30-V DC
  • Low RON nFET Switch Supports Host and Charging Mode
  • Internal 15-ms Start-Up Delay
  • Internal 30-ms Soft-Start Delay to Minimize the USB Inrush Current
  • Transient Protection for VBUS Line:
    • IEC 61000-4-2 Contact Discharge ±15 kV
    • IEC 61000-4-2 Air Gap Discharge ±15 kV
    • IEC 61000-4-5 Open-Circuit Voltage 100 V
  • Integrated Input Enable and Status Output Signal
  • Thermal Shutdown (TSD) Feature
  • Space-Saving DSBGA Package: (1.4 mm × 1.89 mm)
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Description

The TPD1S414 device is a single-chip solution for a USB connector’s VBUS line protection. The bidirectional nFET switch ensures safe current flow in both charging and host mode while protecting the internal system circuits from any overvoltage conditions at the VBUS_CON pin. On the VBUS_CON pin, this device can handle overvoltage protection up to 30 V. After the EN pin toggles low, the TPD1S414 waits 20 ms before turning ON the nFET through a soft-start delay. ACK pin indicates the FET is completely turned ON.

The typical application interface for the TPD1S414 is the VBUS line in USB connectors. Typical end equipment for TPD1S414 are mobiles phones, tablets, wearables, and electronic-point-of-sale (EPOS). The TPD1S414 can also be applied to any system using an interface with a 5-V power rail.

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Technical documentation

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Type Title Date
* Datasheet TPD1S414 USB Charger Overvoltage, Surge, and ESD Protection for VBUS Pin datasheet (Rev. B) Nov. 29, 2015
Selection guides System-Level ESD Protection Guide (Rev. C) Feb. 20, 2018
White papers Designing USB for short-to-battery tolerance in automotive environments Feb. 10, 2016
User guides TPD1S414EVM User's Guide (Rev. A) Jun. 02, 2015
Application notes ESD Layout Guide Mar. 04, 2015
Application notes Design Considerations for System-Level ESD Circuit Protection Sep. 25, 2012
Application notes Reading and Understanding an ESD Protection Datasheet May 19, 2010

Design & development

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Hardware development

EVALUATION BOARDS Download
document-generic User guide
49
Description

The TPD1S414EVM includes 4 TPD1S414YZ’s in various configurations for testing. Three of the TPD1S414YZ’s are configured for IEC61000-4-5 (8/20 μs) compliance testing; one TPD1S414YZ is configured for throughput on USB 2.0 Type A connectors for throughput analysis.

Features
  • Includes 4 TPD1S414YZ’s for evaluation
  • Includes a USB 2.0 throughput channel
  • Includes built-in equipment protection for surge testing
  • Includes Kelvin connections for accurate measurements across the device FET

Design tools & simulation

SIMULATION MODELS Download
SLLM230.ZIP (25 KB) - IBIS Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

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