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Product details

Parameters

Number of switches 4 IO capacitance (Typ) (pF) 1.5 IEC 61000-4-2 contact (+/- kV) 15 IEC 61000-4-2 air-gap (+/- kV) 15 Features Overvoltage protection Bi-/uni-directional Unidirectional Rating Catalog Operating temperature range (C) -40 to 85 Dynamic resistance (Typ) (Ω) 1 Clamping voltage (V) 15 Interface type USB 2.0 open-in-new Find other Application-specific port protection ICs

Package | Pins | Size

WSON (DSQ) 10 4 mm² 2 x 2 open-in-new Find other Application-specific port protection ICs

Features

  • Input Voltage Protection at VBUS up to 28 V
  • Low Ron nFET Switch
  • Supports > 2 A Charging Current
  • ESD Performance D+/D-/ID/VBUS Pins:
    • ±15-kV Contact Discharge (IEC 61000-4-2)
    • ±15-kV Air Gap Discharge (IEC 61000-4-2)
  • Overvoltage and Undervoltage Lockout Features
  • Low Capacitance TVS ESD Clamp for USB2.0 High Speed Data Rate
  • Internal 17 ms Startup Delay
  • Integrated Input Enable and Status Output Signal
  • Thermal Shutdown Feature
  • Space Saving SON Package (2 mm × 2 mm)
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Description

The TPD4S014 is a single-chip solution for USB charger port protection. This device offers low capacitance transient voltage suppressor (TVS) electrostatic discharge (ESD) clamps for the D+, D-, and standard capacitance for the ID pin. On the VBUS pin, this device provides overvoltage protection (OVP) up to 28 V DC. The overvoltage lockout feature ensures that if there is a fault condition at the VBUS line, the TPD4S014 is able to isolate the VBUS line to protect the internal circuitry from damage. There is a 17-ms turn-on delay after VBUS rises above the undervoltage lockout (UVLO) threshold in order to let the voltage stabilize before turning the nFET on. This function acts as a de-glitch and prevents unnecessary switching if there is any ringing on the line during connection.

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Technical documentation

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Type Title Date
* Data sheet TPD4S014 USB Charger Port Protection Including ESD Protection for All Lines and Overvoltage Protection on VBUS datasheet (Rev. G) Dec. 31, 2015
Selection guide ESD by Interface Selection Guide (Rev. A) Jun. 26, 2017
White paper Designing USB for short-to-battery tolerance in automotive environments Feb. 10, 2016
Application note ESD Layout Guide Mar. 04, 2015
User guide TPD4S014EVM User's Guide (Rev. A) Jun. 06, 2014
Application note Design Considerations for System-Level ESD Circuit Protection Sep. 25, 2012
Application note Reading and Understanding an ESD Protection Datasheet May 19, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
1146.54
Description
J6Entry, RSP and TDA2E-17 CPU Board EVM is an evaluation platform designed to speed up development efforts and reduce time to market for Infotainment  reconfigurable Digital Cluster or Integrated Digital Cockpit and ADAS applications. The CPU board integrates key peripherals such as parallel (...)
Features
  • 2GB DDR3L
  • LP8733/LP8732 Power Solution
  • On-board eMMC, NAND, NOR
  • USB3, USB2, PCIe, Ethernet, COM8Q, CAN, MLB, MicroSD and HDMI connectors
EVALUATION BOARD Download
document-generic User guide
49
Description

The TPD4S014 is a single-chip solution for USB charger port protection. This device offers low capacitance TVS type ESD clamps for the D+, D- and standard Capacitance for the ID pin. On the VBUS pin, this device can handle over-voltage protection up to 28V. The over voltage lock-out feature ensures (...)

Features
  • Over-voltage protection functionality
  • Under voltage lockout functionality
  • USB connectors used for ease of use
  • LED indicating fault condition
  • Test point for EN and ACK signals
  • D+, D- lines are routed as differential pair
  • Bottom section of board can be used for measurement of bandwidth and ESD performance.

Design tools & simulation

SIMULATION MODEL Download
SLVM292.ZIP (11 KB) - IBIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOL Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

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WSON (DSQ) 10 View options

Ordering & quality

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