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TPIC6C595

ACTIVE

8-bit shift register with 100mA/ch

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TLC6C598-Q1 ACTIVE Automotive power logic 8-bit Shift Register LED driver Unity gain stable and rail-to-rail input for cost-optimized designs

Product details

Number of channels 8 Topology Open drain Rating Automotive Operating temperature range (°C) -40 to 125 Vin (min) (V) 4.5 Vin (max) (V) 5.5 Vout (max) (V) 33 Features Enable/Shutdown, Thermal shutdown
Number of channels 8 Topology Open drain Rating Automotive Operating temperature range (°C) -40 to 125 Vin (min) (V) 4.5 Vin (max) (V) 5.5 Vout (max) (V) 33 Features Enable/Shutdown, Thermal shutdown
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4 — (—) See data sheet
  • Low rDS(on), 7 Ω Typical
  • Avalanche Energy, 30 mJ
  • Eight Power DMOS Transistor Outputs
    of 100-mA Continuous Current
  • 250-mA Current Limit Capability
  • ESD Protection, 2500 V
  • Output Clamp Voltage, 33 V
  • Devices are Cascadable
  • Low-Power Consumption
  • Low rDS(on), 7 Ω Typical
  • Avalanche Energy, 30 mJ
  • Eight Power DMOS Transistor Outputs
    of 100-mA Continuous Current
  • 250-mA Current Limit Capability
  • ESD Protection, 2500 V
  • Output Clamp Voltage, 33 V
  • Devices are Cascadable
  • Low-Power Consumption

The TPIC6C595 is a monolithic, medium-voltage, low-current power 8-bit shift register designed for use in systems that require relatively moderate load power such as LEDs. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other low-current or medium-voltage loads.

This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift register clock (SRCK) and the register clock (RCK), respectively. The device transfers data out the serial output (SER OUT) port on the rising edge of SRCK. The storage register transfers data to the output buffer when shift register clear (CLR) is high. When CLR is low, the input shift register is cleared. When output enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. When G is held low, data from the storage register is transparent to the output buffers. When data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs have sink-current capability. The SER OUT allows for cascading of the data from the shift register to additional devices.

Outputs are low-side, open-drain DMOS transistors with output ratings of 33-V to 100-mA continuous sink-current capability. Each output provides a 250-mA maximum current limit at TC = 25°C. The current limit decreases as the junction temperature increases for additional device protection. The device also provides up to 2500 V of ESD protection when tested using the human-body model and the 200-V machine model.

The TPIC6C595 is characterized for operation over the operating case temperature range of −40°C to 125°C.

The TPIC6C595 is a monolithic, medium-voltage, low-current power 8-bit shift register designed for use in systems that require relatively moderate load power such as LEDs. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids, and other low-current or medium-voltage loads.

This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift register clock (SRCK) and the register clock (RCK), respectively. The device transfers data out the serial output (SER OUT) port on the rising edge of SRCK. The storage register transfers data to the output buffer when shift register clear (CLR) is high. When CLR is low, the input shift register is cleared. When output enable (G) is held high, all data in the output buffers is held low and all drain outputs are off. When G is held low, data from the storage register is transparent to the output buffers. When data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs have sink-current capability. The SER OUT allows for cascading of the data from the shift register to additional devices.

Outputs are low-side, open-drain DMOS transistors with output ratings of 33-V to 100-mA continuous sink-current capability. Each output provides a 250-mA maximum current limit at TC = 25°C. The current limit decreases as the junction temperature increases for additional device protection. The device also provides up to 2500 V of ESD protection when tested using the human-body model and the 200-V machine model.

The TPIC6C595 is characterized for operation over the operating case temperature range of −40°C to 125°C.

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Type Title Date
* Data sheet TPIC6C595 Power Logic 8-Bit Shift Register datasheet (Rev. D) PDF | HTML 30 Sep 2015
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 30 Apr 2024

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PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
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