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Product details

Parameters

DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3 Control mode D-CAP, S3, S4/S5 Iout VTT (Max) (A) 3 Iq (Typ) (mA) 0.5 Output VREF, VTT Vin (Min) (V) 1.1 Vin (Max) (V) 3.5 Features Complete Solution Rating HiRel Enhanced Product Operating temperature range (C) -55 to 125 open-in-new Find other DDR memory power ICs

Package | Pins | Size

VSON (DRC) 10 9 mm² 3 x 3 open-in-new Find other DDR memory power ICs

Features

  • Input Voltage: Supports 2.5-V Rail and 3.3-V Rail
  • VLDOIN Voltage Range: 1.1 V to 3.5 V
  • Sink and Source Termination Regulator Includes
    Droop Compensation
  • Requires Minimum Output Capacitance of 20-µF
    (Typically 3 × 10-µF MLCCs) for Memory
    Termination Applications (DDR)
  • PGOOD to Monitor Output Regulation
  • EN Input
  • REFIN Input Allows for Flexible Input Tracking
    Either Directly or Through Resistor Divider
  • Remote Sensing (VOSNS)
  • ±10-mA Buffered Reference (REFOUT)
  • Built-in Soft Start, UVLO, and OCL
  • Thermal Shutdown
  • Meets DDR and DDR2 JEDEC Specifications
  • Supports DDR3, Low-Power DDR3, and DDR4
    VTT Applications
  • 10-Pin VSON Package With Thermal Pad
  • Supports Defense, Aerospace, and Medical
    Applications
    • Controlled Baseline
    • One Assembly and Test Site
    • One Fabrication Site
    • Available in Military (–55°C to 125°C)
      Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
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Description

The TPS51200-EP device is a sink and source double data rate (DDR) termination regulator specifically designed for low-input voltage, low-cost, low-noise systems where space is a key consideration.

The TPS51200-EP maintains a fast transient response and only requires a minimum output capacitance of 20 µF. The TPS51200-EP supports a remote sensing function and all power requirements for DDR, DDR2, DDR3, Low-Power DDR3, and DDR4 VTT bus termination.

In addition, the TPS51200-EP provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.

The TPS51200-EP is available in the thermally efficient 10-pin VSON thermal pad package, and is rated both Green and Pb-free. It is specified from –55°C to +125°C.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 4
Type Title Date
* Datasheet TPS51200-EP Sink and Source DDR Termination Regulator datasheet Jun. 29, 2016
* Radiation & reliability report TPS51200MDRCTEP Reliability Report Sep. 21, 2016
VID TPS51200-EP VID V6216610 Mar. 27, 2018
Selection guide TI Components for Aerospace and Defense Guide (Rev. E) Mar. 22, 2017

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
49
Description

The TPS51200EVM evaluation board, HPA322A is designed to evaluate the performance and characteristics of TI's cost optimized DDR/DDR2/DDR3/LP DDR3 VTT termination regulator, the TPS51200. The TPS51200 is designed to provide proper termination voltage and a 10-mA buffered reference voltage for DDR (...)

Features
  • Input Voltage: Support 2.5V Rail and 3.3V Rail
  • VLDOIN, VDDQ Voltage Range: 1.2V-2.5V
  • Build-in transient load switches (with both sinking and sourcing capability) to emulate the sink/source transient behavior which helps to evaluate the dynamic performance. For ease of use, both load step and timing of (...)

Design tools & simulation

SIMULATION MODEL Download
SLUM148.TSC (127 KB) - TINA-TI Reference Design
SIMULATION MODEL Download
SLUM149.ZIP (18 KB) - TINA-TI Spice Model
SIMULATION MODEL Download
SLUM150.TSC (755 KB) - TINA-TI Reference Design
SIMULATION MODEL Download
SLUM151.ZIP (17 KB) - TINA-TI Spice Model
SIMULATION MODEL Download
SLVM068A.ZIP (38 KB) - PSpice Model
SIMULATION MODEL Download
SLVM069.ZIP (30 KB) - PSpice Model

CAD/CAE symbols

Package Pins Download
VSON (DRC) 10 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

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