Product details

Output options Adjustable Output, Negative Output Iout (Max) (A) 0.2 Vin (Max) (V) -3 Vin (Min) (V) -36 Vout (Max) (V) -1.2 Vout (Min) (V) -33 Noise (uVrms) 15 Iq (Typ) (mA) 0.05 Thermal resistance θJA (°C/W) 48 Rating Catalog Load capacitance (Min) (µF) 2.2 Regulated outputs (#) 1 Features Enable, Soft Start Accuracy (%) 2.5 PSRR @ 100 KHz (dB) 55 Dropout voltage (Vdo) (Typ) (mV) 216 Operating temperature range (C) -40 to 125
Output options Adjustable Output, Negative Output Iout (Max) (A) 0.2 Vin (Max) (V) -3 Vin (Min) (V) -36 Vout (Max) (V) -1.2 Vout (Min) (V) -33 Noise (uVrms) 15 Iq (Typ) (mA) 0.05 Thermal resistance θJA (°C/W) 48 Rating Catalog Load capacitance (Min) (µF) 2.2 Regulated outputs (#) 1 Features Enable, Soft Start Accuracy (%) 2.5 PSRR @ 100 KHz (dB) 55 Dropout voltage (Vdo) (Typ) (mV) 216 Operating temperature range (C) -40 to 125
HVSSOP (DGN) 8 9 mm² 3 x 3 VSON (DRB) 8 9 mm² 3 x 3
  • Input Voltage Range: –3 V to –35 V
  • Noise:
    • 14 µVRMS (20 Hz to 20 kHz)
    • 15.1 µVRMS (10 Hz to 100 kHz)
  • Power-Supply Ripple Rejection:
    • 72 dB (120 Hz)
    • ≥ 55 dB (10 Hz to 700 kHz)
  • Adjustable Output: –1.18 V to –33 V
  • Maximum Output Current: 200 mA
  • Dropout Voltage: 216 mV at 100 mA
  • Stable With Ceramic Capacitors ≥ 2.2 µF
  • CMOS Logic-Level-Compatible Enable Pin
  • Built-In, Fixed, Current Limit and Thermal
    Shutdown Protection
  • Packages: 8-Pin HVSSOP PowerPAD™ and
    3-mm × 3-mm VSON
  • Operating Temperature Range:
    –40°C to +125°C
  • Input Voltage Range: –3 V to –35 V
  • Noise:
    • 14 µVRMS (20 Hz to 20 kHz)
    • 15.1 µVRMS (10 Hz to 100 kHz)
  • Power-Supply Ripple Rejection:
    • 72 dB (120 Hz)
    • ≥ 55 dB (10 Hz to 700 kHz)
  • Adjustable Output: –1.18 V to –33 V
  • Maximum Output Current: 200 mA
  • Dropout Voltage: 216 mV at 100 mA
  • Stable With Ceramic Capacitors ≥ 2.2 µF
  • CMOS Logic-Level-Compatible Enable Pin
  • Built-In, Fixed, Current Limit and Thermal
    Shutdown Protection
  • Packages: 8-Pin HVSSOP PowerPAD™ and
    3-mm × 3-mm VSON
  • Operating Temperature Range:
    –40°C to +125°C

The TPS7A30 series of devices are negative, high-voltage (–35 V), ultralow-noise (15.1 µVRMS, 72-dB PSRR) linear regulators that can source a maximum load of 200 mA.

These linear regulators include a CMOS logic-level-compatible enable pin and capacitor-programmable soft-start function that allows for customized power-management schemes. Other features include built-in current limit and thermal shutdown protection to safeguard the device and system during fault conditions.

The TPS7A30 family is designed using bipolar technology, and is ideal for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This design makes the device an excellent choice to power operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A30 family of linear regulators is suitable for post dc-dc converter regulation. By filtering out the output voltage ripple inherent to dc-dc switching conversion, maximum system performance is provided in sensitive instrumentation, test and measurement, audio, and RF applications.

For applications that require positive and negative high-performance rails, consider TI’s TPS7A49 family of positive high-voltage, ultralow-noise linear regulators.

The TPS7A30 series of devices are negative, high-voltage (–35 V), ultralow-noise (15.1 µVRMS, 72-dB PSRR) linear regulators that can source a maximum load of 200 mA.

These linear regulators include a CMOS logic-level-compatible enable pin and capacitor-programmable soft-start function that allows for customized power-management schemes. Other features include built-in current limit and thermal shutdown protection to safeguard the device and system during fault conditions.

The TPS7A30 family is designed using bipolar technology, and is ideal for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This design makes the device an excellent choice to power operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.

In addition, the TPS7A30 family of linear regulators is suitable for post dc-dc converter regulation. By filtering out the output voltage ripple inherent to dc-dc switching conversion, maximum system performance is provided in sensitive instrumentation, test and measurement, audio, and RF applications.

For applications that require positive and negative high-performance rails, consider TI’s TPS7A49 family of positive high-voltage, ultralow-noise linear regulators.

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Technical documentation

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Type Title Date
* Data sheet TPS7A30 –35-V, –200-mA, Ultralow-Noise, Negative Linear Regulator datasheet (Rev. D) 09 Jun 2015
Technical article 3 quiescent-current (Iq) specifications you need to understand 12 Nov 2021
Application note L1 and L2 EV Charger Electric Vehicle Service Equipment Design Considerations (Rev. B) 09 Jun 2021
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Selection guide Power Management Guide 2018 (Rev. R) 25 Jun 2018
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 21 Mar 2018
Technical article Powering up the performance of sensitive test and measurement systems 17 Oct 2017
Technical article Input Isolation for 3-wire Analog Outputs 15 Jun 2015
Technical article Knock out the noise! Create a cleaner PLC design 26 Feb 2015
User guide TPS7A30-49EVM-567 User's Guide 27 Aug 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

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Evaluation board

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Simulation model

TPS7A3001 PSpice Transient Model (Rev. A)

SBVM023A.ZIP (50 KB) - PSpice Model
Simulation model

TPS7A3001 TINA-TI Transient Spice Model (Rev. A)

SBVM214A.ZIP (13 KB) - TINA-TI Spice Model
Simulation model

TPS7A3001 TINA-TI Transient Reference Design (Rev. A)

SBVM215A.TSC (107 KB) - TINA-TI Reference Design
Simulation model

TPS7A3001 Unencrypted PSpice Transient Model

SBVM664.ZIP (2 KB) - PSpice Model
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HVSSOP (DGN) 8 View options
SON (DRB) 8 View options

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