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TPS7H3302-SP

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Radiation-hardened, QMLP, 2.3-V to 3.5-V input, 3-A sink and source DDR termination LDO regulator

TPS7H3302-SP

ACTIVE

Product details

DDR memory type DDR2, DDR3, DDR4 Control mode S3, S4/S5 Iout VTT (max) (A) 3 Iq (typ) (mA) 18 Output VREF, VTT Vin (min) (V) 0.9 Vin (max) (V) 3.5 Features Complete Solution, Shutdown Pin for S3 Rating Space Operating temperature range (°C) -55 to 125 Regulator type Linear Regulator Vin bias (max) (V) 3.5 Vin bias (min) (V) 2.375 Vout VTT (min) (V) 0.6
DDR memory type DDR2, DDR3, DDR4 Control mode S3, S4/S5 Iout VTT (max) (A) 3 Iq (typ) (mA) 18 Output VREF, VTT Vin (min) (V) 0.9 Vin (max) (V) 3.5 Features Complete Solution, Shutdown Pin for S3 Rating Space Operating temperature range (°C) -55 to 125 Regulator type Linear Regulator Vin bias (max) (V) 3.5 Vin bias (min) (V) 2.375 Vout VTT (min) (V) 0.6
HTSSOP (DAP) 32 89.1 mm² 11 x 8.1
  • QMLP TPS7H3302-SP standard microcircuit drawing (SMD) available, 5962R14228
  • Space Ehanced Plastic Vendor item drawing available, VID V62/22615
  • Total ionizing dose (TID) charactericized
    • Radiation hardness assured (RHA) qualified up to total ionizing dose (TID) 100 krad(Si) or 50 krad(Si)
  • Single-Event Effects (SEE) Charactericized
    • Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune up to LET = 70 MeV-cm2 /mg
    • Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized up to 70 MeVcm2 /mg
  • Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
  • Input voltage: supports a 2.5-V and 3.3-V rail
  • Separate low-voltage input (VLDOIN) down to 0.9 V for improved power efficiency
  • 3-A sink and source termination regulator
  • Enable input and power-good output for power supply sequencing
  • VTT termination regulator
    • Output voltage range: 0.5 to 1.75 V
    • 3-A sink and source current
  • Integrated precision voltage divider network with sense input
  • Remote sensing (VTTSNS)
  • VTTREF buffered reference
    • 49% to 51% accuracy with respect to VDDQSNS (±3 mA)
    • ±10 mA sink and source current
  • Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated
  • Plastic package
  • QMLP TPS7H3302-SP standard microcircuit drawing (SMD) available, 5962R14228
  • Space Ehanced Plastic Vendor item drawing available, VID V62/22615
  • Total ionizing dose (TID) charactericized
    • Radiation hardness assured (RHA) qualified up to total ionizing dose (TID) 100 krad(Si) or 50 krad(Si)
  • Single-Event Effects (SEE) Charactericized
    • Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune up to LET = 70 MeV-cm2 /mg
    • Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized up to 70 MeVcm2 /mg
  • Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
  • Input voltage: supports a 2.5-V and 3.3-V rail
  • Separate low-voltage input (VLDOIN) down to 0.9 V for improved power efficiency
  • 3-A sink and source termination regulator
  • Enable input and power-good output for power supply sequencing
  • VTT termination regulator
    • Output voltage range: 0.5 to 1.75 V
    • 3-A sink and source current
  • Integrated precision voltage divider network with sense input
  • Remote sensing (VTTSNS)
  • VTTREF buffered reference
    • 49% to 51% accuracy with respect to VDDQSNS (±3 mA)
    • ±10 mA sink and source current
  • Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated
  • Plastic package

The TPS7H3302 is a radiation-hardend double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3302 supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR3L, and DDR4. The fast transient response of the TPS7H3302 VTT regulator allows for a very stable supply during read/write conditions. The TPS7H3302 also includes a built-in VTTREF supply that tracks VTT to further reduce the solution size. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3302. The enable signal can also be used to discharge VTT during suspend to RAM (S3) power down mode.

The TPS7H3302 is a radiation-hardend double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3302 supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR3L, and DDR4. The fast transient response of the TPS7H3302 VTT regulator allows for a very stable supply during read/write conditions. The TPS7H3302 also includes a built-in VTTREF supply that tracks VTT to further reduce the solution size. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3302. The enable signal can also be used to discharge VTT during suspend to RAM (S3) power down mode.

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Technical documentation

Design & development

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Evaluation board

TPS7H3302EVM — TPS7H3302 evaluation module for 3-A sink and source DDR-termination LDO regulator

The TPS7H3302 (LP085) evaluation module (EVM) is a platform to evaluate the performance and characteristics of the TPS7H3302-SEP, which is radiation-tolerant DDR-, DDR2-, DDR3-, DDR3L- and DDR4-termination low-dropout (LDO) regulator.

User guide: PDF | HTML
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Evaluation board

ALPHA-3P-ADM-VA600-SPACE-AMD — Alpha Data ADM-VA600 kit using AMD Versal core XQRVC1902 ACAP and TI radiation-tolerant products

This is a 6U VPX form factor highlighting the AMD-Xilinx® Versal AI Core XQRVC1902 adaptable SoC/FPGA. The ADM-VA600 is modular board design with one FMC+ connector, DDR4 DRAM and system monitoring. The majority of the components are radiation-tolerant power management, interface, clocking and (...)

Simulation model

TPS7H3302-SEP PSpice Model

SLVME03.ZIP (45 KB) - PSpice Model
Package Pins Download
HTSSOP (DAP) 32 View options

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