Home Power management Gate drivers Low-side drivers

UC1708-SP

ACTIVE

Radiation-tolerant QMLV, 3-A/3-A dual-channel gate driver with 35-V VDD

Product details

Number of channels 2 Power switch IGBT, MOSFET Peak output current (A) 3 Input supply voltage (min) (V) 5 Input supply voltage (max) (V) 35 Features Enable pin, Shutdown, Thermal shutdown Operating temperature range (°C) -55 to 125 Fall time (ns) 25 Input threshold CMOS, TTL Channel input logic Non-Inverting Input negative voltage (V) 0 Rating Space Driver configuration Dual
Number of channels 2 Power switch IGBT, MOSFET Peak output current (A) 3 Input supply voltage (min) (V) 5 Input supply voltage (max) (V) 35 Features Enable pin, Shutdown, Thermal shutdown Operating temperature range (°C) -55 to 125 Fall time (ns) 25 Input threshold CMOS, TTL Channel input logic Non-Inverting Input negative voltage (V) 0 Rating Space Driver configuration Dual
CDIP (J) 16 135.3552 mm² 19.56 x 6.92 CDIP (JG) 8 64.032 mm² 9.6 x 6.67 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • 3.0A Peak Current Totem Pole Output
  • 5 to 35V Operation
  • 25ns Rise and Fall Times
  • 25ns Propagation Delays
  • Thermal Shutdown and Under-Voltage Protection
  • High-Speed, Power MOSFET Compatible
  • Efficient High Frequency Operation
  • Low Cross-Conduction Current Spike
  • Enable and Shutdown Functions
  • Wide Input Voltage Range
  • ESD Protection to 2kV

  • 3.0A Peak Current Totem Pole Output
  • 5 to 35V Operation
  • 25ns Rise and Fall Times
  • 25ns Propagation Delays
  • Thermal Shutdown and Under-Voltage Protection
  • High-Speed, Power MOSFET Compatible
  • Efficient High Frequency Operation
  • Low Cross-Conduction Current Spike
  • Enable and Shutdown Functions
  • Wide Input Voltage Range
  • ESD Protection to 2kV

The UC1708 family of power drivers is made with a high-speed, high-voltage, Schottky process to interface control functions and high-power switching devices — particularly power MOSFETs. Operating over a 5 V to 35 V supply range, these devices contain two independent channels. The A and B inputs are compatible with TTL and CMOS logic families, but can withstand input voltages as high as VIN. Each output can source or sink up to 3 A as long as power dissipation limits are not exceeded.

Although each output can be activated independently with its own inputs, they can be forced low in common through the action of either a digital high signal at the Shutdown terminal or by forcing the Enable terminal low. The Shutdown terminal will only force the outputs low, it will not effect the behavior of the rest of the device. The Enable terminal effectively places the device in under-voltage lockout, reducing power consumption by as much as 90%. During under-voltage and disable (Enable terminal forced low) conditions, the outputs are held in a self-biasing, low-voltage, state.

The UC3708 and UC2708 are available in plastic 8-pin MINI DIP and 16-pin bat-wing DIP packages for commercial operation over a 0°C to 70°C temperature range and industrial temperature range of -25°C to 85°C respectively. For operation over a -55°C to 125°C temperature range, the UC1708 is available in hermetically sealed 8-pin MINI CDIP, 16 pin CDIP and 20 pin CLCC packages. Surface mount devices are also available.

The UC1708 family of power drivers is made with a high-speed, high-voltage, Schottky process to interface control functions and high-power switching devices — particularly power MOSFETs. Operating over a 5 V to 35 V supply range, these devices contain two independent channels. The A and B inputs are compatible with TTL and CMOS logic families, but can withstand input voltages as high as VIN. Each output can source or sink up to 3 A as long as power dissipation limits are not exceeded.

Although each output can be activated independently with its own inputs, they can be forced low in common through the action of either a digital high signal at the Shutdown terminal or by forcing the Enable terminal low. The Shutdown terminal will only force the outputs low, it will not effect the behavior of the rest of the device. The Enable terminal effectively places the device in under-voltage lockout, reducing power consumption by as much as 90%. During under-voltage and disable (Enable terminal forced low) conditions, the outputs are held in a self-biasing, low-voltage, state.

The UC3708 and UC2708 are available in plastic 8-pin MINI DIP and 16-pin bat-wing DIP packages for commercial operation over a 0°C to 70°C temperature range and industrial temperature range of -25°C to 85°C respectively. For operation over a -55°C to 125°C temperature range, the UC1708 is available in hermetically sealed 8-pin MINI CDIP, 16 pin CDIP and 20 pin CLCC packages. Surface mount devices are also available.

Download View video with transcript Video

Similar products you might be interested in

open-in-new Compare alternates
Similar functionality to the compared device
NEW TPS7H6003-SP ACTIVE Radiation-hardened, QMLV 200-V half-bridge GaN gate driver Dual low-side implementation for GaN

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 14
Type Title Date
* Data sheet Dual Non-Inverting Power Driver datasheet (Rev. C) 25 Sep 2007
* Radiation & reliability report UC1708-SP Neutron Displacement Damage (NDD) Characterization 08 Nov 2021
* Radiation & reliability report UC1708-SP Total Ionizing Dose (TID) Lookahead Radiation Report 07 Oct 2020
* SMD UC1708-SP SMD 5962-00514 08 Jul 2016
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 31 Aug 2023
Application note QML flow, its importance, and obtaining lot information (Rev. C) 30 Aug 2023
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 17 Nov 2022
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19 Oct 2022
Selection guide TI Space Products (Rev. I) 03 Mar 2022
Application note DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer 21 Aug 2020
Application note Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form PDF | HTML 18 May 2020
Application brief External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
E-book Radiation Handbook for Electronics (Rev. A) 21 May 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins Download
CDIP (J) 16 View options
CDIP (JG) 8 View options
LCCC (FK) 20 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos