Product details


Number of channels (#) 2 Isolation rating (Vrms) 3000 Power switch MOSFET, IGBT, GaNFET Peak output current (A) 6 DIN V VDE V 0884-10 transient overvoltage rating (Vpk) 4242 DIN V VDE V 0884-10 working voltage (Vpk) 990 Output VCC/VDD (Max) (V) 18 Output VCC/VDD (Min) (V) 6 Input VCC (Min) (V) 3 Input VCC (Max) (V) 5.5 Prop delay (ns) 28 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 5 open-in-new Find other Isolated gate drivers

Package | Pins | Size

SOIC (D) 16 59 mm² 9.9 x 6 open-in-new Find other Isolated gate drivers


  • Supports basic and functional isolation
  • CMTI greater than 100-V/ns
  • 4-A peak source, 6-A peak sink output
  • Switching parameters:
    • 40-ns maximum propagation delay
    • 5-ns maximum delay matching
    • 5.5-ns maximum pulse-width distortion
    • 35-µs maximum VDD power-up delay
  • Up to 18-V VDD output drive supply
    • 5-V and 8-V VDD UVLO Options
  • Operating temp. range (TA) –40°C to 125°C
  • Narrow body SOIC-16 (D) package
  • Rejects input pulses shorter than 5-ns
  • TTL and CMOS compatible inputs
  • Safety-related certifications:
    • 4242-VPK isolation per DIN V VDE V 0884-11:2017-01 and DIN EN 61010-1 (planned)
    • 3000-VRMS isolation for 1 minute per UL 1577
    • CQC certification per GB4943.1-2011 (planned)
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The UCC21220 and UCC21220A devices are basic and functional isolated dual-channel gate drivers with 4-A peak-source and 6-A peak-sink current. They are designed to drive power MOSFETs and GaNFETs in PFC, Isolated DC/DC, and synchronous rectification applications, with fast switching performance and robust ground bounce protection through greater than 100-V/ns common-mode transient immunity (CMTI).

These devices can be configured as two low-side drivers, two high-side drivers, or half-bridge drivers. Two outputs can be paralleled to form a single driver which doubles the drive strength for heavy load conditions due to the best-in-class delay matching performance.

Protection features include: DIS pin shuts down both outputs simultaneously when it is set high; INA/B pin rejects input transient shorter than 5-ns; both inputs and outputs can withstand –2-V spikes for 200-ns, all supplies have undervoltage lockout (UVLO), and active pull down protection clamps the output below 2.1-V when unpowered or floated.

With these features, these devices enable high efficiency, high power density, and robustness in a wide variety of power applications.

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Technical documentation

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Type Title Date
* Data sheet UCC21220, UCC21220A 4-A/6-A, Dual-Channel Basic and Functional Isolated Gate Driver With High Noise Immunity datasheet (Rev. E) May 01, 2019
Certificate VDE Certificate for Basic Isolation for DIN VDE V 0884-11:2017-01 (Rev. S) Aug. 03, 2021
User guide Peak Efficiency at 99%, 585-W High-Voltage Buck Reference Design Apr. 24, 2020
Application note External Gate Resistor Selection Guide (Rev. A) Feb. 28, 2020
Application note Understanding Peak IOH and IOL Currents (Rev. A) Feb. 28, 2020
Certificate UL Certification E181974 Vol 4. Sec 9 (Rev. A) Jul. 22, 2019
User guide Gate Drive Voltage vs. Efficiency Apr. 25, 2019
Application note How to Drive High Voltage GaN FETs with UCC21220A Mar. 06, 2019
White paper Impact of an isolated gate driver (Rev. A) Feb. 20, 2019
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse Sep. 19, 2018
Application note Common Mode Transient Immunity (CMTI) for UCC2122x Isolated Gate Drivers Jul. 19, 2018
White paper Demystifying high-voltage power electronics for solar inverters Jun. 06, 2018
Application note Solar Inverter Layout Considerations for UCC21220 Jun. 06, 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime May 30, 2018
Technical article Boosting efficiency for your solar inverter designs May 24, 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage Apr. 17, 2018
User guide UCC21220EVM-009 User's Guide (Rev. B) Apr. 12, 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide
UCC21220EVM-009 is designed for evaluating UCC21220, which is a 3.0-kVRMS Isolated Dual-Channel Gate Driver with 4.0-A source and 6.0-A sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC component selection (...)
  • High performance driver with input and output interface.
  • Ability to test most data sheet parameters
  • Ability to compare performance of various drivers with compatible pinout

Design tools & simulation

SLUM649.ZIP (58 KB) - PSpice Model
SLUM650.ZIP (3 KB) - PSpice Model
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

Reference designs

リファレンス・デザイン Download
Peak efficiency at 99%, 585-W high-voltage buck reference design with standard Si-MOSFETs
PMP30446 — This reference design converts a DC-input source in the range of 450 V to 780 V into non-isolated 390 V at 1.5 A. This is an alternative solution to SiC-FET and SiC-Diode buck converter, since the actual power stage uses only standard silicon components. In order to employ 600 V rated devices, the (...)
document-generic Schematic document-generic User guide
リファレンス・デザイン Download
54-Vdc input, 12-V 4-A output half-bridge reference design
PMP40500 — This 12-V, 42-A output half-bridge reference design is for bus converters in wired networking campus and branch switches. The design features high efficiency and various fault protections (over-current, short-circuit). The guide provides a efficiency comparison using 3kVrms basic and functional (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

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SOIC (D) 16 View options

Ordering & quality

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