Product details

Bus voltage (Max) (V) 620 Power switch MOSFET, IGBT Input VCC (Min) (V) 10 Input VCC (Max) (V) 22 Peak output current (A) 1.0 Rise time (ns) 35 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 10 Rating Catalog Number of channels (#) 2 Fall time (ns) 16 Prop delay (ns) 100 Iq (uA) 250 Input threshold TTL, CMOS Channel input logic Non-Inverting Negative voltage handling at HS pin (V) -11 Features Interlock Driver configuration CMOS Compatible, Dual, Non-Inverting, TTL Compatible
Bus voltage (Max) (V) 620 Power switch MOSFET, IGBT Input VCC (Min) (V) 10 Input VCC (Max) (V) 22 Peak output current (A) 1.0 Rise time (ns) 35 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 10 Rating Catalog Number of channels (#) 2 Fall time (ns) 16 Prop delay (ns) 100 Iq (uA) 250 Input threshold TTL, CMOS Channel input logic Non-Inverting Negative voltage handling at HS pin (V) -11 Features Interlock Driver configuration CMOS Compatible, Dual, Non-Inverting, TTL Compatible
SOIC (D) 8 19 mm² 4.9 x 3.9
  • High-Side and Low-Side Configuration
  • Dual Inputs With Output Interlock and 150-ns Deadtime
  • Fully Operational up to 620-V, 700-V Absolute Maximum on HB Pin
  • 10-V to 20-V VDD Recommended Range
  • Peak Output Current 0.5-A Source, 1.0-A Sink
  • dv/dt Immunity of 50 V/ns
  • Logic Operational up to –11 V on HS Pin
  • Negative Voltage Tolerance On Inputs of –5 V
  • Large Negative Transient Safe Operating Area
  • UVLO Protection for Both Channels
  • Small Propagation Delay (140 ns Typical)
  • Delay Matching (8 ns Typical)
  • Floating Channel Designed for Bootstrap Operation
  • Low Quiescent Current
  • TTL and CMOS Compatible Inputs
  • Industry Standard SOIC-8 Package
  • All Parameters Specified Over Temperature Range, –40 °C to +125 °C
  • High-Side and Low-Side Configuration
  • Dual Inputs With Output Interlock and 150-ns Deadtime
  • Fully Operational up to 620-V, 700-V Absolute Maximum on HB Pin
  • 10-V to 20-V VDD Recommended Range
  • Peak Output Current 0.5-A Source, 1.0-A Sink
  • dv/dt Immunity of 50 V/ns
  • Logic Operational up to –11 V on HS Pin
  • Negative Voltage Tolerance On Inputs of –5 V
  • Large Negative Transient Safe Operating Area
  • UVLO Protection for Both Channels
  • Small Propagation Delay (140 ns Typical)
  • Delay Matching (8 ns Typical)
  • Floating Channel Designed for Bootstrap Operation
  • Low Quiescent Current
  • TTL and CMOS Compatible Inputs
  • Industry Standard SOIC-8 Package
  • All Parameters Specified Over Temperature Range, –40 °C to +125 °C

The UCC27710 is a 620-V high-side and low-side gate driver with 0.5-A source, 1.0-A sink current, targeted to drive power MOSFETs or IGBTs.

The recommended VDD operating voltage is 10-V to 20-V for IGBT’s and 10-V to 17-V for power MOSFETs.

The UCC27710 includes protection features where the outputs are held low when the inputs are left open or when the minimum input pulse width specification is not met. Interlock and deadtime functions prevent both outputs from being turned on simultaneously. In addition, the device accepts a wide range bias supply range from 10 V to 20 V, and offers UVLO protection for both the VDD and HB bias supply.

Developed with TI’s state of the art high-voltage device technology, the device features robust drive with excellent noise and transient immunity including large negative voltage tolerance on its inputs, high dV/dt tolerance, wide negative transient safe operating area (NTSOA) on the switch node (HS), and interlock.

The device consists of one ground-referenced channel (LO) and one floating channel (HO) which is designed for operating with bootstrap or isolated power supplies. The device features fast propagation delays and excellent delay matching between both channels. On the UCC27710, each channel is controlled by its respective input pins, HI and LI.

The UCC27710 is a 620-V high-side and low-side gate driver with 0.5-A source, 1.0-A sink current, targeted to drive power MOSFETs or IGBTs.

The recommended VDD operating voltage is 10-V to 20-V for IGBT’s and 10-V to 17-V for power MOSFETs.

The UCC27710 includes protection features where the outputs are held low when the inputs are left open or when the minimum input pulse width specification is not met. Interlock and deadtime functions prevent both outputs from being turned on simultaneously. In addition, the device accepts a wide range bias supply range from 10 V to 20 V, and offers UVLO protection for both the VDD and HB bias supply.

Developed with TI’s state of the art high-voltage device technology, the device features robust drive with excellent noise and transient immunity including large negative voltage tolerance on its inputs, high dV/dt tolerance, wide negative transient safe operating area (NTSOA) on the switch node (HS), and interlock.

The device consists of one ground-referenced channel (LO) and one floating channel (HO) which is designed for operating with bootstrap or isolated power supplies. The device features fast propagation delays and excellent delay matching between both channels. On the UCC27710, each channel is controlled by its respective input pins, HI and LI.

Download

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

UCC27710EVM-005 — UCC27710 620-V, 0.5-A, 1.0-A High-Side Low-Side Gate Driver Evaluation Module

UCC27710EVM-005 is designed for evaluating UCC27710D, which is a 620V half bridge gate driver with adequate source and sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC component selection guide. The EVM can (...)
In stock
Limit: 3
Simulation model

UCC27710 PSpice Transient Model

SLUM591.ZIP (69 KB) - PSpice Model
Simulation model

UCC27710 Unencrypted PSpice Transient Model

SLUM634.ZIP (3 KB) - PSpice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins Download
SOIC (D) 8 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos