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Digital-Analog-Wandler (DACs)
Highspeed-DACs (> 10 MSPSS)

DAC3484

AKTIV

Vierkanaliger interpolierender Digital-Analog-Wandler (DAC) 16 Bit, 1,25 GSPS, 1 – 16x

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Datenblatt

DAC3484

AKTIV
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Produktdetails

Resolution (Bits) 16 Number of DAC channels 4 Interface type Parallel LVDS Sample/update rate (Msps) 1250 Features Ultra High Speed Rating Catalog Interpolation 16x, 1x, 2x, 4x, 8x Power consumption (typ) (mW) 1200 SFDR (dB) 82 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Int
Resolution (Bits) 16 Number of DAC channels 4 Interface type Parallel LVDS Sample/update rate (Msps) 1250 Features Ultra High Speed Rating Catalog Interpolation 16x, 1x, 2x, 4x, 8x Power consumption (typ) (mW) 1200 SFDR (dB) 82 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Int
NFBGA (ZAY) 196 144 mm² 12 x 12 WQFN-MR (RKD) 88 81 mm² 9 x 9
  • Very Low Power: 1.27 W at 1.25 GSPS, Full
    Operating Conditions
  • Multi-DAC Synchronization
  • Selectable 2x, 4x, 8x, 16x Interpolation Filter
    • Stop-Band Attenuation > 90 dBc
  • Flexible On-chip Complex Mixing
    • Two Independent Fine Mixers with 32-Bit
      NCOs
    • Power Saving Coarse Mixers: ± n×Fs/8
  • High Performance, Low Jitter Clock Multiplying
    PLL
  • Digital I and Q Correction
    • Gain, Phase, Offset, and Group Delay
      Correction
  • Digital Inverse Sinc Filter
  • Flexible 16-Bit LVDS Input Data Bus
    • 8 Sample Input FIFO
    • Data Pattern Checker
    • Parity Check
    • GC5330 Compatible
  • Temperature Sensor
  • Differential Scalable Output: 10 mA to 30 mA
  • Multiple Package Options: 88-Pin 9×9mm WQFN
    and 196-Ball 12mm×12mm NFBGA (GREEN / Pb-
    Free)
  • Very Low Power: 1.27 W at 1.25 GSPS, Full
    Operating Conditions
  • Multi-DAC Synchronization
  • Selectable 2x, 4x, 8x, 16x Interpolation Filter
    • Stop-Band Attenuation > 90 dBc
  • Flexible On-chip Complex Mixing
    • Two Independent Fine Mixers with 32-Bit
      NCOs
    • Power Saving Coarse Mixers: ± n×Fs/8
  • High Performance, Low Jitter Clock Multiplying
    PLL
  • Digital I and Q Correction
    • Gain, Phase, Offset, and Group Delay
      Correction
  • Digital Inverse Sinc Filter
  • Flexible 16-Bit LVDS Input Data Bus
    • 8 Sample Input FIFO
    • Data Pattern Checker
    • Parity Check
    • GC5330 Compatible
  • Temperature Sensor
  • Differential Scalable Output: 10 mA to 30 mA
  • Multiple Package Options: 88-Pin 9×9mm WQFN
    and 196-Ball 12mm×12mm NFBGA (GREEN / Pb-
    Free)

The DAC3484 is a very low power, high dynamic range, quad-channel, 16-bit digital-to-analog converter (DAC) with a sample rate as high as 1.25 GSPS.

The device includes features that simplify the design of complex transmit architectures: 2× to 16× digital interpolation filters with over 90dB of stop-band attenuation simplify the data interface and reconstruction filters. Independent complex mixers allow flexible carrier placement. A high-performance low jitter clock multiplier simplifies clocking of the device without significant impact on the dynamic range. The digital Quadrature Modulator Correction (QMC) enables complete IQ compensation for gain, offset, phase and group delay between channels in direct up-conversion applications.

Digital data is input to the device through a 16-bit LVDS data bus with on-chip termination. The device includes a FIFO, data pattern checker and parity test to ease the input interface. The interface also allows full synchronization of multiple devices.

The device is characterized for operation over the entire industrial temperature range of –40°C to 85°C and is available in a very-small 88-pin 9x9mm WQFN package or 196-ball 12×12mm NFBGA package.

Very low power, small size, superior crosstalk, high dynamic range and features of the DAC3484 are an ideal fit for systems with multiple transmit channels.

The DAC3484 is a very low power, high dynamic range, quad-channel, 16-bit digital-to-analog converter (DAC) with a sample rate as high as 1.25 GSPS.

The device includes features that simplify the design of complex transmit architectures: 2× to 16× digital interpolation filters with over 90dB of stop-band attenuation simplify the data interface and reconstruction filters. Independent complex mixers allow flexible carrier placement. A high-performance low jitter clock multiplier simplifies clocking of the device without significant impact on the dynamic range. The digital Quadrature Modulator Correction (QMC) enables complete IQ compensation for gain, offset, phase and group delay between channels in direct up-conversion applications.

Digital data is input to the device through a 16-bit LVDS data bus with on-chip termination. The device includes a FIFO, data pattern checker and parity test to ease the input interface. The interface also allows full synchronization of multiple devices.

The device is characterized for operation over the entire industrial temperature range of –40°C to 85°C and is available in a very-small 88-pin 9x9mm WQFN package or 196-ball 12×12mm NFBGA package.

Very low power, small size, superior crosstalk, high dynamic range and features of the DAC3484 are an ideal fit for systems with multiple transmit channels.
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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet DAC3484 Quad-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter (DAC) datasheet (Rev. E) PDF | HTML 04 Nov 2015
Application note QFN and SON PCB Attachment (Rev. C) PDF | HTML 06 Dez 2023
Application note Effects of Clock Spur on High Speed DAC Performance (Rev. A) 18 Mai 2015
Design guide TSW308x Wideband Digital to RF Transmit Solution Design Guide 03 Sep 2013
Design guide Analog Interfacing Networks for DAC348x and Modulators (TIDA-00077) (Rev. A) 14 Aug 2013
Application note Using DAC348x with Fault Detection and Auto Output Shut-off Feature 21 Feb 2013
Application note DAC348x Device Configuration and Synchronization 18 Feb 2013
Application note Effects of Clock Noise on High Speed DAC Performance 08 Nov 2012
Application note High Speed, Digital-to-Analog Converters Basics (Rev. A) 23 Okt 2012
Application note Design Summary Multi-row Quad Flat No-lead (MRQFN) 29 Aug 2012
User guide TSW1400 Pattern Generators 03 Mai 2012
Application note Configuring and Optimizing On-Chip PLL of the DAC348x 26 Jan 2012
User guide TSW3085EVM ACPR and EVM Measurements (TIDA-00076 Reference Guide) 29 Dez 2011
User guide TSW3725 Evaluation Module 25 Okt 2011

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

TSW3084EVM — Evaluierungsplatine und Referenzdesign für Breitband-Übertragungssignalkette

The TSW3084EVM Evaluation Module is a circuit board that allows system designers to evaluate the combined performance of Texas Instruments' transmit signal chain with the LMK04806B low noise clock generator/jitter cleaner. For ease of use as a complete RF transmit solution the TSW3084EVM includes (...)

Benutzerhandbuch: PDF
Nicht verfügbar auf TI.com
Evaluierungsplatine

TSW3085EVM — Evaluierungsplatine und Referenzdesign für Breitband-Übertragungssignalkette

The TSW3085 Evalutaion Module is a circuit board that allows system designers to evaluate the combined performance of Texas Instruments' transmit signal chain with the LMK04806B (formally National Semiconductor) low noise clock generator/jitter cleaner. For ease of use as a complete RF transmit (...)

Benutzerhandbuch: PDF
Nicht verfügbar auf TI.com
Evaluierungsplatine

SUNM-3P-SOM — Sundance Multiprozessor-Technologie Vierkanal-DAC-FMC-Modul mit 1,25 GHz und DAC3484

SMT-FMC211 uses the Texas Instruments 4 channel DAC – TI’s Quad 1.25GHz DAC3484. This device offers excellent SFDR performance better than 70dBc, with an output sample rate of over 312MSPS. It interfaces to an Artix-7 XC7A15T-2C FPGA using a 16 bit differential DDR bus. The FPGA (...)
Von: Sundance Multiprocessor Technology
Partner-Website besuchen
GUI für Evaluierungsmodul (EVM)

DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.31

This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)

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GUI für Evaluierungsmodul (EVM)

SLAC483 — DAC348x EVM Software GUI

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GUI für Evaluierungsmodul (EVM)

SLAC507 — TSW308x EVM Software

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GUI für Evaluierungsmodul (EVM)

SLLC420 — TSW3100EVM GUI v2.7

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Simulationsmodell

DAC3484 IBIS Model (Rev. A)

SLAM072A.ZIP (33 KB) - IBIS Model
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Simulationsmodell

TINA-TI SPICE Models: Analog Interfacing Networks for DAC348x and Modulators

SLUC481.ZIP (198 KB) - TINA-TI Spice Model
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Leiterplatten-Layout

TSW2200EVM Design Package PCB

SLWR039.ZIP (3979 KB)
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Schaltplan

TSW2110EVM Design Package board rev B

SLAR064.ZIP (1580 KB)
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Schaltplan

TSW3100 Design Package

SLLC424.ZIP (15830 KB)
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Simulationstool

PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool

PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese Design- und Simulationssuite mit vollem Funktionsumfang verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
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Referenzdesigns

TIDA-00077 — Analoge Schnittstellennetzwerke für DAC348x und Modulatoren

The analog interface circuits in this reference design are often used between current-source based digital-to analog converters (DAC) and quadrature modulators. While the DAC348x is used as an example of a TI high-speed DAC, the circuits can be applied to other current-source based converters with (...)
Design guide: PDF
Schaltplan: PDF
Referenzdesigns

TIDA-00072 — Breitband-Digital-zu-HF-Sendelösung

The TSW308x is an example design of a wideband digital to RF transmit solution capable of generating 600 MHz of contiguous RF spectrum.  The system provides a reference on how to use the DAC34x8x, TRF3705 IQ modulator and LMK0480x to achieve this.  This reference EVM coupled with a (...)
Design guide: PDF
Schaltplan: PDF
Referenzdesigns

TIDA-00068 — Basisstation-Transceiver mit DPD-Rückkopplungspfad

The design is for a small cell base station development platform.  It provides two real receive paths, two complex transmit paths, and a shared real feedback path.  This design has macro basestation performance, but with small cell base station footprint.  The current design handles (...)
Schaltplan: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
NFBGA (ZAY) 196 Ultra Librarian
WQFN-MR (RKD) 88 Ultra Librarian
Es gelten die allgemeinen Geschäftsbedingungen von TI für Evaluierungsartikel.

Bestellen & Qualität

Beinhaltete Information:
  • RoHS
  • REACH
  • Bausteinkennzeichnung
  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

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