25-MHz clock out, Cable diagnostics, IEEE 1588v2/802.1AS time synchronization, IEEE 1588v2/802.1AS time synchronization and AVB clock generation, IEEE 802.3bw & Open Alliance (OA) compliant, Integrated LPF, Single supply, TC10, Wettable flank package

I/O supply voltage (typ) (V)

1.8, 2.5, 3.3

Operating temperature range (°C)

-40 to 125

Number of LEDs

2

ESD HBM (kV)

8

Datarate (Mbps)

100BASE-T1

Interface type

MII, RGMII, RMII, SGMII

Rating

Automotive

Number of ports

Single

Features

25-MHz clock out, Cable diagnostics, IEEE 1588v2/802.1AS time synchronization, IEEE 1588v2/802.1AS time synchronization and AVB clock generation, IEEE 802.3bw & Open Alliance (OA) compliant, Integrated LPF, Single supply, TC10, Wettable flank package

I/O supply voltage (typ) (V)

1.8, 2.5, 3.3

Operating temperature range (°C)

-40 to 125

Number of LEDs

2

ESD HBM (kV)

8

VQFN (RHA)

36

36 mm² 6 x 6

IEEE802.3bw compliant 100BASE-T1 PHY
AEC-Q100 qualified for automotive applications:
- Temperature grade 1: –40°C to +125°C, TA
IEEE 802.1AS time synchronization
- Highly accurate 1pps signal
- Multiple IOs for event capture and trigger
Synchronized audio clock generation for AVB
- I2S and TDMx SCLK/FSYNC clock generation
- Configurable FSYNC, SCLK, MCLK frequencies
- Automatic phase adjustment through IEEE1722 CRF decode
OA TC-10 compliant sleep, wake up
Robust EMC performance
- IEC62228-5, OA EMC compliant
- IEC61000-4-2 ESD level 4 MDI: ±8kV CD
- SAE J2962-3 EMC compliant
- 39dBm DPI immunity with ±5% asymmetry
- < 4dBµV radiated emissions in GPS and glonass bands
- Stripline emissions: class-II compliant
MAC Interfaces: MII, RMII, RGMII, SGMII
Footprint compatible with TI’s 100BASE-T1, 1000BASE-T1 PHY - with BOM options
48V ready: VBAT transients to MDI up to +/– 70V
Diagnostic tool kit
- Signal quality indication (SQI) and time domain reflectometry (TDR)
- Voltage, temperature, and ESD sensors
- PPM monitor: provides external clock ppm drift (up to ±100ppb accuracy)
Single 3.3V supply capability

IEEE802.3bw compliant 100BASE-T1 PHY
AEC-Q100 qualified for automotive applications:
- Temperature grade 1: –40°C to +125°C, TA
IEEE 802.1AS time synchronization
- Highly accurate 1pps signal
- Multiple IOs for event capture and trigger
Synchronized audio clock generation for AVB
- I2S and TDMx SCLK/FSYNC clock generation
- Configurable FSYNC, SCLK, MCLK frequencies
- Automatic phase adjustment through IEEE1722 CRF decode
OA TC-10 compliant sleep, wake up
Robust EMC performance
- IEC62228-5, OA EMC compliant
- IEC61000-4-2 ESD level 4 MDI: ±8kV CD
- SAE J2962-3 EMC compliant
- 39dBm DPI immunity with ±5% asymmetry
- < 4dBµV radiated emissions in GPS and glonass bands
- Stripline emissions: class-II compliant
MAC Interfaces: MII, RMII, RGMII, SGMII
Footprint compatible with TI’s 100BASE-T1, 1000BASE-T1 PHY - with BOM options
48V ready: VBAT transients to MDI up to +/– 70V
Diagnostic tool kit
- Signal quality indication (SQI) and time domain reflectometry (TDR)
- Voltage, temperature, and ESD sensors
- PPM monitor: provides external clock ppm drift (up to ±100ppb accuracy)
Single 3.3V supply capability

The DP83TC816-Q1 is an IEEE 802.3bw and Open Alliance (OA) compliant automotive qualified 100Base-T1 Ethernet physical layer transceiver. The device provides all physical layer functions needed to transmit and receive data over unshielded, shielded single twisted-pair cables with xMII interface flexibility.

DP83TC816-Q1 integrates IEEE802.1AS / IEEE1588v2 hardware time stamping and fractional PLL, enabling highly accurate time synchronization. The fractional PLL enables frequency and phase synchronization of the wall clock (eliminating the need for external VCXO) and generation of a wide range of time synchronized frequencies needed for audio and other ADAS applications. The PHY also integrates IEEE 1722 CRF decode to generate Media clock and Bit Clock for AVB and other audio applications.

The DP83TC816-Q1 is an IEEE 802.3bw and Open Alliance (OA) compliant automotive qualified 100Base-T1 Ethernet physical layer transceiver. The device provides all physical layer functions needed to transmit and receive data over unshielded, shielded single twisted-pair cables with xMII interface flexibility.

DP83TC816-Q1 integrates IEEE802.1AS / IEEE1588v2 hardware time stamping and fractional PLL, enabling highly accurate time synchronization. The fractional PLL enables frequency and phase synchronization of the wall clock (eliminating the need for external VCXO) and generation of a wide range of time synchronized frequencies needed for audio and other ADAS applications. The PHY also integrates IEEE 1722 CRF decode to generate Media clock and Bit Clock for AVB and other audio applications.

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*	Data sheet	DP83TC816-Q1 100Base-T1 Automotive Ethernet PHY Transceiver With IEEE802.1AS , AVB Clocks and TC10 Sleep-Wake datasheet	PDF \| HTML	06 Nov 2025

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DP83TC816-Q1 — Ethernet-PHY für die Automobilindustrie, 100BASE–T1, mit AVB-Taktgenerierung, RGMII, SGMII, IEEE802.

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DP83TC816-Q1

Ethernet-PHY für die Automobilindustrie, 100BASE–T1, mit AVB-Taktgenerierung, RGMII, SGMII, IEEE802.

DP83TC816-Q1

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DP83TC816-Q1-DESIGN — Automotive Ethernet 100BASE-T1 PHY Transceiver with AVB, IEEE802.1AS and TC-10

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