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DS90LV049Q-Q1

AKTIV

LVDS-Dual-Highspeed-Differenzialtransceiver für die Automobilindustrie

Produktdetails

Function Transceiver Protocols LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVCMOS, LVDS, LVTTL Output signal LVCMOS, LVDS Rating Automotive Operating temperature range (°C) -40 to 125
Function Transceiver Protocols LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVCMOS, LVDS, LVTTL Output signal LVCMOS, LVDS Rating Automotive Operating temperature range (°C) -40 to 125
TSSOP (PW) 16 32 mm² 5 x 6.4
  • AECQ-100 Grade 1
  • Up to 400 Mbps Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 50 ps Typical Driver Channel-to-Channel Skew
  • 50 ps Typical Receiver Channel-to-Channel Skew
  • 3.3 V Single Power Supply Design
  • TRI-STATE Output Control
  • Internal Fail-Safe Biasing of Receiver Inputs
  • Low Power Dissipation (70 mW at 3.3 V Static)
  • High Impedance on LVDS Outputs on Power Down
  • Conforms to TIA/EIA-644-A LVDS Standard
  • Available in Low Profile 16 Pin TSSOP Package

All trademarks are the property of their respective owners.

  • AECQ-100 Grade 1
  • Up to 400 Mbps Switching Rates
  • Flow-Through Pinout Simplifies PCB Layout
  • 50 ps Typical Driver Channel-to-Channel Skew
  • 50 ps Typical Receiver Channel-to-Channel Skew
  • 3.3 V Single Power Supply Design
  • TRI-STATE Output Control
  • Internal Fail-Safe Biasing of Receiver Inputs
  • Low Power Dissipation (70 mW at 3.3 V Static)
  • High Impedance on LVDS Outputs on Power Down
  • Conforms to TIA/EIA-644-A LVDS Standard
  • Available in Low Profile 16 Pin TSSOP Package

All trademarks are the property of their respective owners.

The DS90LV049Q is a dual CMOS flow-through differential line driver-receiver pair designed for applications requiring ultra low power dissipation, exceptional noise immunity, and high data throughput. The device is designed to support data rates in excess of 400 Mbps utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV049Q drivers accept LVTTL/LVCMOS signals and translate them to LVDS signals. The receivers accept LVDS signals and translate them to 3 V CMOS signals. The LVDS input buffers have internal failsafe biasing that places the outputs to a known H (high) state for floating receiver inputs. In addition, the DS90LV049Q supports a TRI-STATE function for a low idle power state when the device is not in use.

The EN and EN inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four gates.

The DS90LV049Q is a dual CMOS flow-through differential line driver-receiver pair designed for applications requiring ultra low power dissipation, exceptional noise immunity, and high data throughput. The device is designed to support data rates in excess of 400 Mbps utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV049Q drivers accept LVTTL/LVCMOS signals and translate them to LVDS signals. The receivers accept LVDS signals and translate them to 3 V CMOS signals. The LVDS input buffers have internal failsafe biasing that places the outputs to a known H (high) state for floating receiver inputs. In addition, the DS90LV049Q supports a TRI-STATE function for a low idle power state when the device is not in use.

The EN and EN inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four gates.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet DS90LV049Q Automotive LVDS Dual Line Driver and Receiver Pair datasheet (Rev. D) 16 Apr 2013
Application brief LVDS to Improve EMC in Motor Drives 27 Sep 2018
Application note An Overview of LVDS Technology 05 Okt 1998

Design und Entwicklung

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Evaluierungsplatine

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Simulationsmodell

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
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Bestellen & Qualität

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  • Kontinuierliches Zuverlässigkeitsmonitoring
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  • Werksstandort
  • Montagestandort

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