Gehäuseinformationen
| Gehäuse | Pins NFBGA (ZXH) | 48 |
| Betriebstemperaturbereich (°C) -40 to 105 |
| Gehäusemenge | Träger 250 | SMALL T&R |
Merkmale von HD3SS212
- Compatible with DisplayPort 1.2 electrical standard
- 2:1 switching supporting data rates up to 5.4Gbps
- Supports HPD switching
- Wide -3dB differential BW of over 5.4 GHz
- Excellent dynamic characteristics (at 2.7GHz)
- Crosstalk = –50dB
- Isolation = –22dB
- Insertion loss = –1.4dB
- Return loss = –11 dB
- Max bit-bit skew = 4 ps
- VDD operating range 3.3 V ±10%
- Small 5 mm x 5 mm x 1 mm, 48-ball nFBGA package
- Output enable (oe) pin disables switch to save power
- Power consumption
- HD3SS212 <10mW (standby <30µW when OE = L)
Beschreibung von HD3SS212
The HD3SS212 is a high-speed passive switch capable of switching two full DisplayPort 4 lane ports from one of two sources to one target location in an application. For DisplayPort applications that HD3SS212 also supports switching of the Auxiliary (AUX) and Hot Plug Detect (HPD) signals. HPD path is a buffer which requires a 125kΩ pull-down resistor on the HPDC line.
A typical application would be a mother board that includes two GPUs that need to drive one DisplayPort sink. The GPU is selected by the Dx_SEL pin. The HD3SS212 is offered in a 48-ball bfBGA package and specified to operate from a single supply voltage of 3.3V over full industrial temperature range of –40°C to 105°C.