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PCA9548A

AKTIV

8-Kanal, 2,3- bis 5,5-V-I2C/SMBus-Schalter mit Reset und Spannungsumsetzung

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Drop-In-Ersatz mit gegenüber dem verglichenen Baustein verbesserter Funktionalität
TCA9548A AKTIV 8-Kanal, 1,65- bis 5,5-V-I2C/SMBus-Schalter mit Reset und Spannungsumsetzung Performance enhancements for power-on reset and lower voltage operation.

Produktdetails

Addresses 8 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 2.3 Features Reset pin Rating Catalog Frequency (max) (MHz) 0.4 Operating temperature range (°C) -40 to 85 Number of channels 8
Addresses 8 Supply voltage (max) (V) 5.5 Supply voltage (min) (V) 2.3 Features Reset pin Rating Catalog Frequency (max) (MHz) 0.4 Operating temperature range (°C) -40 to 85 Number of channels 8
SOIC (DW) 24 159.65 mm² 15.5 x 10.3 SSOP (DB) 24 63.96 mm² 8.2 x 7.8 TSSOP (PW) 24 49.92 mm² 7.8 x 6.4 TVSOP (DGV) 24 32 mm² 5 x 6.4 VQFN (RGE) 24 16 mm² 4 x 4
  • 1-of-8 Bidirectional Translating Switches
  • I2C Bus and SMBus Compatible
  • Active-Low Reset Input
  • Three Hardware Address Pins for Use of up to Eight PCA9548A Devices on the I2C Bus
  • Channel Selection Via I2C Bus
  • Power-Up with All Switch Channels Deselected
  • Low RON Switches
  • Allows Voltage-Level Translation Between 1.8-V, 2.5-V, 3.3-V, and 5-V Buses
  • No Glitch on Power Up
  • Supports Hot Insertion
  • Low Standby Current
  • Operating Power-Supply Voltage Range of 2.3 V to 5.5 V
  • 5-V Tolerant Inputs
  • 0-kHz to 400-kHz Clock Frequency
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • 1-of-8 Bidirectional Translating Switches
  • I2C Bus and SMBus Compatible
  • Active-Low Reset Input
  • Three Hardware Address Pins for Use of up to Eight PCA9548A Devices on the I2C Bus
  • Channel Selection Via I2C Bus
  • Power-Up with All Switch Channels Deselected
  • Low RON Switches
  • Allows Voltage-Level Translation Between 1.8-V, 2.5-V, 3.3-V, and 5-V Buses
  • No Glitch on Power Up
  • Supports Hot Insertion
  • Low Standby Current
  • Operating Power-Supply Voltage Range of 2.3 V to 5.5 V
  • 5-V Tolerant Inputs
  • 0-kHz to 400-kHz Clock Frequency
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

The PCA9548A device has eight bidirectional translating switches that can be controlled through the I2C bus. The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the programmable control register. These downstream channels can be used to resolve I2C slave address conflicts. For example, if eight identical digital temperature sensors are needed in the application, one sensor can be connected at each channel: 0-7.

The system master can reset the PCA9548A in the event of a time-out or other improper operation by asserting a low in the RESET input. Similarly, the power-on reset deselects all channels and initializes the I2C/SMBus state machine. Asserting RESET causes the same reset and initialization to occur without powering down the part. This allows recovery should once of the downstream I2C buses get stuck in a low state.

The pass gates of the switches are constructed so that the VCC pin can be used to limit the maximum high voltage, which is passed by the PCA9548A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5-V tolerant.

The PCA9548A device has eight bidirectional translating switches that can be controlled through the I2C bus. The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individual SCx/SDx channel or combination of channels can be selected, determined by the contents of the programmable control register. These downstream channels can be used to resolve I2C slave address conflicts. For example, if eight identical digital temperature sensors are needed in the application, one sensor can be connected at each channel: 0-7.

The system master can reset the PCA9548A in the event of a time-out or other improper operation by asserting a low in the RESET input. Similarly, the power-on reset deselects all channels and initializes the I2C/SMBus state machine. Asserting RESET causes the same reset and initialization to occur without powering down the part. This allows recovery should once of the downstream I2C buses get stuck in a low state.

The pass gates of the switches are constructed so that the VCC pin can be used to limit the maximum high voltage, which is passed by the PCA9548A. This allows the use of different bus voltages on each pair, so that 1.8-V, 2.5-V or 3.3-V parts can communicate with 5-V parts, without any additional protection. External pull-up resistors pull the bus up to the desired voltage level for each channel. All I/O pins are 5-V tolerant.

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Alle anzeigen 11
Typ Titel Datum
* Data sheet PCA9548A Low Voltage 8-Channel I2C Switch with Reset datasheet (Rev. G) PDF | HTML 11 Mär 2021
Application note I2C Solutions for Hot Swap Applications (Rev. A) 31 Jan 2023
Application note I2C Dynamic Addressing 25 Apr 2019
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Choosing the Correct I2C Device for New Designs PDF | HTML 07 Sep 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dez 2015
Application note Understanding the I2C Bus PDF | HTML 30 Jun 2015
Application note Maximum Clock Frequency of I2C Bus Using Repeaters 15 Mai 2015
Application note I2C Bus Pull-Up Resistor Calculation PDF | HTML 13 Feb 2015
Application note Programming Fun Lights With TI's TCA6507 30 Nov 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004

Design und Entwicklung

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
SOIC (DW) 24 Ultra Librarian
SSOP (DB) 24 Ultra Librarian
TSSOP (PW) 24 Ultra Librarian
TVSOP (DGV) 24 Ultra Librarian
VQFN (RGE) 24 Ultra Librarian

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