SN65LVDS32

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Vierfach-Highspeed- LVDS-Differenzialempfänger, 400 Mbit/s

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Datenblatt

document-pdfAcrobat SNx5LVDS32, SN65LVDS3486, SN65LVDS9637 High-Speed Differential Line Receivers datasheet (Rev. R) (Englisch)

SN65LVDS32

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Produktdetails

Function

Receiver

Protocols

LVDS

Number of transmitters

0

Number of receivers

4

Signaling rate (Mbps)

100

Input signal

LVDS

Output signal

LVTTL

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Function

Receiver

Protocols

LVDS

Number of transmitters

0

Number of receivers

4

Signaling rate (Mbps)

100

Input signal

LVDS

Output signal

LVTTL

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SOIC (D)

16

59.4 mm² (9.9 mm × 6 mm)

TSSOP (PW)

16

32 mm² (5 mm × 6.4 mm)

SOP (NS)

16

79.56 mm² (10.2 mm × 7.8 mm)

Meet or Exceed the Requirements of ANSI
TIA/EIA-644 Standard
Operate With a Single 3.3-V Supply
Designed for Signaling Rates of up to
150 Mbps
Differential Input Thresholds ±100 mV Max
Typical Propagation Delay Time of 2.1 ns
Power Dissipation 60 mW Typical Per
Receiver at Maximum Data Rate
Bus-Terminal ESD Protection Exceeds 8 kV
Low-Voltage TTL (LVTTL) Logic Output
Levels
Pin Compatible With AM26LS32, MC3486,
and µA9637
Open-Circuit Fail-Safe
Cold Sparing for Space and High-Reliability
Applications Requiring Redundancy

Meet or Exceed the Requirements of ANSI
TIA/EIA-644 Standard
Operate With a Single 3.3-V Supply
Designed for Signaling Rates of up to
150 Mbps
Differential Input Thresholds ±100 mV Max
Typical Propagation Delay Time of 2.1 ns
Power Dissipation 60 mW Typical Per
Receiver at Maximum Data Rate
Bus-Terminal ESD Protection Exceeds 8 kV
Low-Voltage TTL (LVTTL) Logic Output
Levels
Pin Compatible With AM26LS32, MC3486,
and µA9637
Open-Circuit Fail-Safe
Cold Sparing for Space and High-Reliability
Applications Requiring Redundancy

The SN55LVDS32, SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are differential line receivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.

The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer depends on the attenuation characteristics of the media and the noise coupling to the environment.

The SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are characterized for operation from –40°C to 85°C. The SN55LVDS32 device is characterized for operation from –55°C to 125°C.

The SN55LVDS32, SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are differential line receivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.

The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer depends on the attenuation characteristics of the media and the noise coupling to the environment.

The SN65LVDS32, SN65LVDS3486, and SN65LVDS9637 devices are characterized for operation from –40°C to 85°C. The SN55LVDS32 device is characterized for operation from –55°C to 125°C.

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Top-Dokumentation	Typ	Titel		Datum
*	Datenblatt	SNx5LVDS32, SN65LVDS3486, SN65LVDS9637 High-Speed Differential Line Receivers datasheet (Rev. R)	06.08.2014
	Application brief	LVDS to Improve EMC in Motor Drives	27.09.2018
	Application brief	How Far, How Fast Can You Operate LVDS Drivers and Receivers?	03.08.2018
	Application brief	How to Terminate LVDS Connections with DC and AC Coupling	16.05.2018
	Anwendungshinweis	Performance of LVDS with Different Cables (Rev. B)	11.02.2002
	Anwendungshinweis	LVDS Multidrop Connections (Rev. A)	11.02.2002
	Anwendungshinweis	An Overview of LVDS Technology	05.10.1998

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

SN65LVDS31-32EVM — SN65LVDS31-32EVM-Evaluierungsmodul für SNx5LVDS31 und SNx5LVDS32

The SN65LVDS31-32EVM evaluation moduel (EVM) includes the SV65LVDS31 quad driver and the SN65LVDS32 quad receiver. The SN65LVDS31 device is a TIA/EIA-644 standard-compliant LVDS driver. The SN65LVDS32 device is a TIA/EIA-644 standard-compliant receiver that has a passive open-circuit failsafe (...)

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