SN74FB1650

AKTIV

Universeller 18-Bit-TTL/BTL-Speichertransceiver

Produktdetails

Technology family FB Applications GTL Rating Catalog Operating temperature range (°C) 0 to 70
Technology family FB Applications GTL Rating Catalog Operating temperature range (°C) 0 to 70
HLQFP (PCA) 100 256 mm² 16 x 16
  • Compatible With IEEE Std 1194.1-1991 (BTL)
  • TTL A Port, Backplane Transceiver Logic (BTL) B\ Port
  • Open-Collector B\-Port Outputs Sink 100 mA
  • BIAS VCC Minimizes Signal Distortion During Live Insertion or Withdrawal
  • High-Impedance State During Power Up and Power Down
  • B\-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage
  • TTL-Input Structures Incorporate Active Clamping to Aid in Line Termination

  • Compatible With IEEE Std 1194.1-1991 (BTL)
  • TTL A Port, Backplane Transceiver Logic (BTL) B\ Port
  • Open-Collector B\-Port Outputs Sink 100 mA
  • BIAS VCC Minimizes Signal Distortion During Live Insertion or Withdrawal
  • High-Impedance State During Power Up and Power Down
  • B\-Port Biasing Network Preconditions the Connector and PC Trace to the BTL High-Level Voltage
  • TTL-Input Structures Incorporate Active Clamping to Aid in Line Termination

The SN74FB1650 contains two 9-bit transceivers designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991.

The B\ port operates at BTL-signal levels. The open-collector B\ ports are specified to sink 100 mA. Two output enables (OEB and OEB\) are provided for the B\ outputs. When OEB is low, OEB\ is high, or VCC is less than 2.1 V, the B\ port is turned off.

The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state.

BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.

BG VCC and BG GND are the supply inputs for the bias generator.

The SN74FB1650 contains two 9-bit transceivers designed to translate signals between TTL and backplane transceiver-logic (BTL) environments. The device is designed specifically to be compatible with IEEE Std 1194.1-1991.

The B\ port operates at BTL-signal levels. The open-collector B\ ports are specified to sink 100 mA. Two output enables (OEB and OEB\) are provided for the B\ outputs. When OEB is low, OEB\ is high, or VCC is less than 2.1 V, the B\ port is turned off.

The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable (OEA) is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state.

BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.

BG VCC and BG GND are the supply inputs for the bias generator.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet SN74FB1650 datasheet (Rev. O) 10 Mär 2004
Application note Understanding Transient Drive Strength vs. DC Drive Strength in CMOS Output Buffers PDF | HTML 14 Mai 2024
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 30 Apr 2024
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dez 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 10 Mai 2002
Selection guide Advanced Bus Interface Logic Selection Guide 09 Jan 2001
Application note GTL/BTL: A Low-Swing Solution for High-Speed Digital Logic (Rev. A) 01 Mär 1997
Application note Next-Generation BTL/Futurebus Transceivers Allow Single-Sided SMT Manufacturing (Rev. C) 01 Mär 1997
Application note Understanding Advanced Bus-Interface Products Design Guide 01 Mai 1996

Design und Entwicklung

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Simulationsmodell

SN74FB1650 IBIS Model (Rev. B)

SCBM009B.ZIP (11 KB) - IBIS Model
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
HLQFP (PCA) 100 Ultra Librarian

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