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TPS53626

AKTIV

2-phasiger Abwärtsregler, D-CAP+™, für VR13 CPU VCORE und DDR-Speicher

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Datenblatt

TPS53626

AKTIV
Datenblatt Jetzt bestellen

Produktdetails

Rating Catalog Topology Multiphase Iout (max) (A) 70 Vin (max) (V) 28 Vin (min) (V) 4.5 Vout (max) (V) 1.52 Vout (min) (V) 0.25 Control mode D-CAP+ Features Adjustable current limit, Dynamic Voltage Scaling, Enable, Light Load Efficiency, Output discharge, Phase Interleaving, Power good, Pre-Bias Start-Up, Remote Sense, SVID, Synchronous Rectification Duty cycle (max) (%) 30 Iq (typ) (A) 0.0035 Number of phases 2 Operating temperature range (°C) -40 to 105
Rating Catalog Topology Multiphase Iout (max) (A) 70 Vin (max) (V) 28 Vin (min) (V) 4.5 Vout (max) (V) 1.52 Vout (min) (V) 0.25 Control mode D-CAP+ Features Adjustable current limit, Dynamic Voltage Scaling, Enable, Light Load Efficiency, Output discharge, Phase Interleaving, Power good, Pre-Bias Start-Up, Remote Sense, SVID, Synchronous Rectification Duty cycle (max) (%) 30 Iq (typ) (A) 0.0035 Number of phases 2 Operating temperature range (°C) -40 to 105
VQFN (RSM) 32 16 mm² 4 x 4
  • Intel VR13 Serial VID (SVID) Compliant
  • 1- or 2-Phase Operation
  • Default Configuration Mode for VR13 VCCIO and VMCP
  • Supports Both Droop and Non-Droop Applications
  • 8-Bit DAC with 5-mV Step
  • Output Range: 0.25 V to 1.52 V
  • Optimized Efficiency at Light and Heavy Loads
  • 8 Independent Levels of Overshoot Reduction (OSR) and Undershoot Reduction (USR)
  • Driverless Configuration for Efficient High-Frequency Switching
  • Supports Discrete, Power Block, Power Stage or DrMOS MOSFET Implementations
  • Accurate, Adjustable Voltage Positioning
  • 300-kHz to 1-MHz Frequency Selections
  • Patented AutoBalance Phase Balancing
  • Programmable ON-Pulse Extension for Load Transient Boost
  • Programmable Auto DCM and CCM Operation
  • Selectable 8-level Current Limit
  • 4.5-V to 28-V Conversion Voltage Range
  • Small, 4 mm × 4 mm, 32-Pin, VQFN PowerPad Package
  • Intel VR13 Serial VID (SVID) Compliant
  • 1- or 2-Phase Operation
  • Default Configuration Mode for VR13 VCCIO and VMCP
  • Supports Both Droop and Non-Droop Applications
  • 8-Bit DAC with 5-mV Step
  • Output Range: 0.25 V to 1.52 V
  • Optimized Efficiency at Light and Heavy Loads
  • 8 Independent Levels of Overshoot Reduction (OSR) and Undershoot Reduction (USR)
  • Driverless Configuration for Efficient High-Frequency Switching
  • Supports Discrete, Power Block, Power Stage or DrMOS MOSFET Implementations
  • Accurate, Adjustable Voltage Positioning
  • 300-kHz to 1-MHz Frequency Selections
  • Patented AutoBalance Phase Balancing
  • Programmable ON-Pulse Extension for Load Transient Boost
  • Programmable Auto DCM and CCM Operation
  • Selectable 8-level Current Limit
  • 4.5-V to 28-V Conversion Voltage Range
  • Small, 4 mm × 4 mm, 32-Pin, VQFN PowerPad Package

The TPS53626 device is a driverless, VR13 SVID compliant, synchronous buck controller. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The device also supports single-phase operation in CCM or DCM for light-load efficiency boost. The device integrates a full set of VR13 I/O features including VR_READY (PGOOD), ALERT and VR_HOT. The SVID interface address allows programming from 00h to 07h. Adjustable control of VOUT slew rate can be programmed as high as 20mV/uS.

Paired with the TI NexFET Power Stage, this total solution delivers exceptionally high speed and low switching loss. The TPS53626 also offers four default modes that configure VCCIO and VMCP settings with one single external resistor to save component count and board space.

The TPS53626 device package is a space saving, thermally enhanced 32-pin VQFN package that operates from –40°C to 105°C.

For all available packages, see the orderable addendum at the end of the document.

The TPS53626 device is a driverless, VR13 SVID compliant, synchronous buck controller. Advanced control features such as D-CAP+ architecture with overlapping pulse support undershoot reduction (USR) and overshoot reduction (OSR) provide fast transient response, lowest output capacitance and high efficiency. The device also supports single-phase operation in CCM or DCM for light-load efficiency boost. The device integrates a full set of VR13 I/O features including VR_READY (PGOOD), ALERT and VR_HOT. The SVID interface address allows programming from 00h to 07h. Adjustable control of VOUT slew rate can be programmed as high as 20mV/uS.

Paired with the TI NexFET Power Stage, this total solution delivers exceptionally high speed and low switching loss. The TPS53626 also offers four default modes that configure VCCIO and VMCP settings with one single external resistor to save component count and board space.

The TPS53626 device package is a space saving, thermally enhanced 32-pin VQFN package that operates from –40°C to 105°C.

For all available packages, see the orderable addendum at the end of the document.
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Technische Dokumentation

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* Data sheet 2-Phase, D-CAP+™ Step-Down Controller for VR13 CPU VCORE and DDR Memory datasheet 09 Jul 2015

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