AM2431

ACTIVO

MCU basada en Arm® Cortex®-R5F con comunicaciones industriales y seguridad hasta 800 MHz

Detalles del producto

CPU Arm Cortex-R5F Frequency (MHz) 800 Certified protocol software stacks EnDat 2.2 Features EtherCAT, EtherNet/IP, IO-Link, Integrated industrial protocols, Profinet, TSN Operating system FreeRTOS TI functional safety category Functional Safety-Compliant Rating Catalog Power supply solution LP8733, TPS65219 Operating temperature range (°C) -40 to 125 Ethernet Yes
CPU Arm Cortex-R5F Frequency (MHz) 800 Certified protocol software stacks EnDat 2.2 Features EtherCAT, EtherNet/IP, IO-Link, Integrated industrial protocols, Profinet, TSN Operating system FreeRTOS TI functional safety category Functional Safety-Compliant Rating Catalog Power supply solution LP8733, TPS65219 Operating temperature range (°C) -40 to 125 Ethernet Yes
FCBGA (ALV) 441 295.84 mm² 17.2 x 17.2 FCCSP (ALX) 293 121 mm² 11 x 11
  • Up to 2× Dual-core Arm Cortex-R5F MCU subsystems operating at up to 800MHz, highly-integrated for real-time processing
    • Dual-core Arm Cortex-R5F clusters support dual-core and single-core operation
    • 32KB I-cache and 32KB D-cache per R5F core with SECDED ECC on all memories
    • Single-core: 128KB TCM per cluster (128KB TCM per R5F core)
    • Dual-core: 128KB TCM per cluster (64KB TCM per R5F core)
  • 1× Single-core Arm Cortex-M4F MCU at up to 400MHz
    • 256KB SRAM with SECDED ECC
  • Up to 2MB of On-chip RAM (OCSRAM) with SECDED ECC:
    • Can be divided into smaller banks in increments of 256KB for as many as 8 separate memory banks
    • Each memory bank can be allocated to a single core to facilitate software task partitioning
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4, DDR4 memory types
    • 16-bit data bus with inline ECC
    • Supports speeds up to 1600 MT/s
  • Device Management Security Controller (DMSC-L)
    • Centralized SoC system controller
    • Manages system services including initial boot, security, and clock/reset/power management
    • Communication with various processing units over message manager
    • Simplified interface for optimizing unused peripherals
    • On-Chip Debug functionality through JTAG and Trace interfaces)
  • Data Movement Subsystem (DMSS)
    • Block Copy DMA (BCDMA)
    • Packet DMA (PKTDMA)
    • Secure Proxy (SEC_PROXY)
    • Ring Accelerator (RINGACC)
  • Time Sync Subsystem
    • Central Platform Time Sync (CPTS) module
    • Timer Manager (TIMERMANAGER) with 1024 timers
    • Time Sync and Compare event interrupt routers
  • 2× Gigabit Industrial Communication Subsystems (PRU_ICSSG)
    • Optional support for Profinet IRT, Profinet RT, EtherNet/IP, EtherCAT, Time-Sensitive Networking (TSN), and other Networking Protocols
    • Backwards compatibility with 10/100Mb PRU-ICSS
    • Each PRU_ICSSG contains:
      • 3× PRU RISC Cores per Slice (2× Slice per PRU_ICSSG)
        • PRU General Use core (PRU)
        • PRU Real-Time Unit core (PRU-RTU)
        • PRU Transmit core (PRU-TX)
      • Each PRU core supports the following features:
        • Instruction RAM with ECC
        • Broadside RAM
        • Multiplier with optional accumulator (MAC)
        • CRC16/32 hardware accelerator
        • Byte swap for Big/Little Endian conversion
        • SUM32 hardware accelerator for UDP checksum
        • Task Manager for preemption support
      • Up to 2× Ethernet ports
        • RGMII (10/100/1000)
        • MII (10/100)
      • Three Data RAMs with ECC
      • 8 banks of 30 × 32-bit register scratchpad memory
      • Interrupt controller and task manager
      • 2× 64-bit Industrial Ethernet Peripherals (IEPs) for time stamping and other time synchronization functions
      • 18× Sigma-Delta Filter Module (SDFM) interfaces
        • Short circuit logic
        • Over-current logic
      • 6× Multi-protocol position encoder interfaces
      • 1× Enhanced Capture Module (ECAP)
      • 16550-compatible UART
        • Dedicated 192MHz clock to support 12Mbps PROFIBUS
  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Security co-processor (DMSC-L) for key and security management, with dedicated device level interconnect for security
    • Secure watchdog/timer/IPC
    • Extensive firewall support for isolation
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
      • Supports cryptographic cores
    • AES – 128-/192-/256-Bit key sizes
    • SHA2 – 224-/256-/384-/512-Bit key sizes
    • DRBG with true random number generator
    • PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging
  • 6× Inter-Integrated Circuit (I2C) ports
  • 9× Universal Asynchronous Receive/Transmit (UART) modules
  • 1× 12-bit Analog-to-Digital Converters (ADC)
    • Configurable sample rate up to 4MSPS
    • 8× multiplexed analog inputs
  • 7× Multichannel Serial Peripheral Interfaces (SPI) controllers
  • 3× General-Purpose I/O (GPIO) modules
  • 9× Enhanced Pulse-Width Modulator (EPWM) modules
  • 3× Enhanced Capture (ECAP) modules
  • 3× Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2× Modular Controller Area Network (MCAN) modules with full CAN-FD support
  • 2× Fast Serial Interface Transmitter (FSITX) cores
  • 6× Fast Serial Interface Receiver (FSIRX) cores

High-speed interfaces:

  • 1× Integrated Ethernet switch supporting: (CPSW)
    • Up to 2 external Ethernet ports
      • RGMII (10/100/1000)
      • RMII (10/100)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • Energy efficient Ethernet (802.3az)
  • 1× PCI-Express Gen2 controller (PCIE)
    • Supports Gen2 Single Lane operation
  • 1× USB 3.1 Dual-Role Device (DRD) Subsystem (USBSS)
    • Port configurable as USB Host, USB Device, or USB Dual-Role device
    • USB Device: High-speed (480Mbps) and Full-speed (12Mbps)
    • USB Host: SuperSpeed Gen1 (5Gbps), High-speed (480Mbps), Full-speed (12Mbps), and Low-speed (1.5Mbps)
    • Integrated USB VBUS detection
  • 1× Serializer/Deserializer (SERDES)
    • One SERDES PHY lane to support eitherPCI-Express Gen2 or USB SuperSpeed Gen1
  • 2× Multimedia Card/Secure Digital (MMCSD) interfaces
    • One 8-bit for eMMC (MMCSD0)
    • One 4-bit for MMCSD/SDIO (MMCSD1)
    • Integrated analog switch for voltage switching from 3.3V to 1.8V for high-speed cards
  • 1× General-Purpose Memory Controller (GPMC)
    • 16-bit parallel bus with 133MHz clock or
    • 32-bit parallel bus with 100MHz clock
    • Error Location Module (ELM) support
  • 1× Flash Subsystem (FSS) for external memory configurable as either:
    • 1× Octal SPI (OSPI) flash interface
    • or 1× Quad SPI (QSPI) flash interface
  • Simplified power sequencing requirements
  • Dual-voltage I/O Support (3.3V / 1.8V)
  • Integrated SDIO LDO for handling automatic voltage transition for SD interface
  • Integrated voltage supervisor for monitoring over-voltage and under-voltage conditions
  • Integrated power supply glitch detector for detecting fast supply transients

Functional safety:

  • Functional Safety-Compliant
    • Developed for functional safety applications
    • Documentation available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL 3
    • Hardware integrity up to SIL 2
    • Safety-related certification
    • ECC or parity on calculation-critical memories
    • Built-In Self-Test (BIST) for CPU and on-chip RAM
    • Error Signaling Module (ESM) with dedicated error pin
    • ECC and parity on select internal bus interconnects
    • Run-time safety diagnostics, including:
      • Voltage, Temperature, and Clock Monitoring
      • Windowed Watchdog Timers
      • CRC Engine for memory integrity checks
    • MCU domain with dedicated memory, interfaces, and M4FSS capable of isolation from the larger SoC with Freedom From Interference (FFI) features:
      • Separate interconnect
      • Firewalls and timeout gaskets
      • Controlled reset isolation
      • Dedicated MCU PLL and MMR control
      • Separate I/O voltage supply rail
  • Supports boot from OSPI/QSPI Flash, SPI Flash, parallel NOR Flash, parallel NAND Flash, UART, I2C, MMCSD, eMMC, USB, PCIe, and Ethernet interfaces.
  • 16-nm FinFET technology
  • ALV: 17.2mm × 17.2mm, 0.8mm pitch(441-pin) [Lidded] Flip-Chip Ball Grid Array(FCBGA)
  • ALX: 11.0mm × 11.0mm, 0.5mm pitch(293-pin) [Overmolded] Flip-Chip Chip Scale Package(FCCSP) 
  • Up to 2× Dual-core Arm Cortex-R5F MCU subsystems operating at up to 800MHz, highly-integrated for real-time processing
    • Dual-core Arm Cortex-R5F clusters support dual-core and single-core operation
    • 32KB I-cache and 32KB D-cache per R5F core with SECDED ECC on all memories
    • Single-core: 128KB TCM per cluster (128KB TCM per R5F core)
    • Dual-core: 128KB TCM per cluster (64KB TCM per R5F core)
  • 1× Single-core Arm Cortex-M4F MCU at up to 400MHz
    • 256KB SRAM with SECDED ECC
  • Up to 2MB of On-chip RAM (OCSRAM) with SECDED ECC:
    • Can be divided into smaller banks in increments of 256KB for as many as 8 separate memory banks
    • Each memory bank can be allocated to a single core to facilitate software task partitioning
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4, DDR4 memory types
    • 16-bit data bus with inline ECC
    • Supports speeds up to 1600 MT/s
  • Device Management Security Controller (DMSC-L)
    • Centralized SoC system controller
    • Manages system services including initial boot, security, and clock/reset/power management
    • Communication with various processing units over message manager
    • Simplified interface for optimizing unused peripherals
    • On-Chip Debug functionality through JTAG and Trace interfaces)
  • Data Movement Subsystem (DMSS)
    • Block Copy DMA (BCDMA)
    • Packet DMA (PKTDMA)
    • Secure Proxy (SEC_PROXY)
    • Ring Accelerator (RINGACC)
  • Time Sync Subsystem
    • Central Platform Time Sync (CPTS) module
    • Timer Manager (TIMERMANAGER) with 1024 timers
    • Time Sync and Compare event interrupt routers
  • 2× Gigabit Industrial Communication Subsystems (PRU_ICSSG)
    • Optional support for Profinet IRT, Profinet RT, EtherNet/IP, EtherCAT, Time-Sensitive Networking (TSN), and other Networking Protocols
    • Backwards compatibility with 10/100Mb PRU-ICSS
    • Each PRU_ICSSG contains:
      • 3× PRU RISC Cores per Slice (2× Slice per PRU_ICSSG)
        • PRU General Use core (PRU)
        • PRU Real-Time Unit core (PRU-RTU)
        • PRU Transmit core (PRU-TX)
      • Each PRU core supports the following features:
        • Instruction RAM with ECC
        • Broadside RAM
        • Multiplier with optional accumulator (MAC)
        • CRC16/32 hardware accelerator
        • Byte swap for Big/Little Endian conversion
        • SUM32 hardware accelerator for UDP checksum
        • Task Manager for preemption support
      • Up to 2× Ethernet ports
        • RGMII (10/100/1000)
        • MII (10/100)
      • Three Data RAMs with ECC
      • 8 banks of 30 × 32-bit register scratchpad memory
      • Interrupt controller and task manager
      • 2× 64-bit Industrial Ethernet Peripherals (IEPs) for time stamping and other time synchronization functions
      • 18× Sigma-Delta Filter Module (SDFM) interfaces
        • Short circuit logic
        • Over-current logic
      • 6× Multi-protocol position encoder interfaces
      • 1× Enhanced Capture Module (ECAP)
      • 16550-compatible UART
        • Dedicated 192MHz clock to support 12Mbps PROFIBUS
  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Security co-processor (DMSC-L) for key and security management, with dedicated device level interconnect for security
    • Secure watchdog/timer/IPC
    • Extensive firewall support for isolation
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
      • Supports cryptographic cores
    • AES – 128-/192-/256-Bit key sizes
    • SHA2 – 224-/256-/384-/512-Bit key sizes
    • DRBG with true random number generator
    • PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging
  • 6× Inter-Integrated Circuit (I2C) ports
  • 9× Universal Asynchronous Receive/Transmit (UART) modules
  • 1× 12-bit Analog-to-Digital Converters (ADC)
    • Configurable sample rate up to 4MSPS
    • 8× multiplexed analog inputs
  • 7× Multichannel Serial Peripheral Interfaces (SPI) controllers
  • 3× General-Purpose I/O (GPIO) modules
  • 9× Enhanced Pulse-Width Modulator (EPWM) modules
  • 3× Enhanced Capture (ECAP) modules
  • 3× Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2× Modular Controller Area Network (MCAN) modules with full CAN-FD support
  • 2× Fast Serial Interface Transmitter (FSITX) cores
  • 6× Fast Serial Interface Receiver (FSIRX) cores

High-speed interfaces:

  • 1× Integrated Ethernet switch supporting: (CPSW)
    • Up to 2 external Ethernet ports
      • RGMII (10/100/1000)
      • RMII (10/100)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • Energy efficient Ethernet (802.3az)
  • 1× PCI-Express Gen2 controller (PCIE)
    • Supports Gen2 Single Lane operation
  • 1× USB 3.1 Dual-Role Device (DRD) Subsystem (USBSS)
    • Port configurable as USB Host, USB Device, or USB Dual-Role device
    • USB Device: High-speed (480Mbps) and Full-speed (12Mbps)
    • USB Host: SuperSpeed Gen1 (5Gbps), High-speed (480Mbps), Full-speed (12Mbps), and Low-speed (1.5Mbps)
    • Integrated USB VBUS detection
  • 1× Serializer/Deserializer (SERDES)
    • One SERDES PHY lane to support eitherPCI-Express Gen2 or USB SuperSpeed Gen1
  • 2× Multimedia Card/Secure Digital (MMCSD) interfaces
    • One 8-bit for eMMC (MMCSD0)
    • One 4-bit for MMCSD/SDIO (MMCSD1)
    • Integrated analog switch for voltage switching from 3.3V to 1.8V for high-speed cards
  • 1× General-Purpose Memory Controller (GPMC)
    • 16-bit parallel bus with 133MHz clock or
    • 32-bit parallel bus with 100MHz clock
    • Error Location Module (ELM) support
  • 1× Flash Subsystem (FSS) for external memory configurable as either:
    • 1× Octal SPI (OSPI) flash interface
    • or 1× Quad SPI (QSPI) flash interface
  • Simplified power sequencing requirements
  • Dual-voltage I/O Support (3.3V / 1.8V)
  • Integrated SDIO LDO for handling automatic voltage transition for SD interface
  • Integrated voltage supervisor for monitoring over-voltage and under-voltage conditions
  • Integrated power supply glitch detector for detecting fast supply transients

Functional safety:

  • Functional Safety-Compliant
    • Developed for functional safety applications
    • Documentation available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL 3
    • Hardware integrity up to SIL 2
    • Safety-related certification
    • ECC or parity on calculation-critical memories
    • Built-In Self-Test (BIST) for CPU and on-chip RAM
    • Error Signaling Module (ESM) with dedicated error pin
    • ECC and parity on select internal bus interconnects
    • Run-time safety diagnostics, including:
      • Voltage, Temperature, and Clock Monitoring
      • Windowed Watchdog Timers
      • CRC Engine for memory integrity checks
    • MCU domain with dedicated memory, interfaces, and M4FSS capable of isolation from the larger SoC with Freedom From Interference (FFI) features:
      • Separate interconnect
      • Firewalls and timeout gaskets
      • Controlled reset isolation
      • Dedicated MCU PLL and MMR control
      • Separate I/O voltage supply rail
  • Supports boot from OSPI/QSPI Flash, SPI Flash, parallel NOR Flash, parallel NAND Flash, UART, I2C, MMCSD, eMMC, USB, PCIe, and Ethernet interfaces.
  • 16-nm FinFET technology
  • ALV: 17.2mm × 17.2mm, 0.8mm pitch(441-pin) [Lidded] Flip-Chip Ball Grid Array(FCBGA)
  • ALX: 11.0mm × 11.0mm, 0.5mm pitch(293-pin) [Overmolded] Flip-Chip Chip Scale Package(FCCSP) 

AM243x is an extension of Sitara’s industrial-grade portfolio into high-performance microcontrollers. The AM243x device is built for industrial applications, such as motor drives and remote I/O modules, which require a combination of real-time communications and processing. The AM243x family provides scalable performance with up to four Cortex-R5F MCUs, one Cortex-M4F, and two instances of Sitara’s gigabit TSN-enabled PRU_ICSSG.

The AM243x SoC architecture was designed to provide best-in-class real-time performance through the high-performance Arm Cortex-R5F cores, Tightly-Coupled Memory (TCM) banks, configurable SRAM partitioning, and dedicated low-latency paths to and from peripherals for rapid data movement in and out of the SoC. This deterministic architecture allows for AM243x to handle the tight control loops found in servo drives while the peripherals like FSI, GPMC, ECAPs, PWMs, and encoder interfaces help enable a number of different architectures found in these systems.

The SoC provides flexible industrial communications capability including full protocol stacks for EtherCAT target, PROFINET device, EtherNet/IP adapter, and IO-Link Controller. The PRU_ICSSG further provides capability for gigabit and TSN based protocols. In addition, the PRU_ICSSG enables additional interfaces including a UART interface, sigma delta decimation filters, and absolute encoder interfaces.

Functional safety features can be enabled through the integrated Cortex-M4F along with dedicated peripherals which can all be isolated from the rest of the SoC. AM243x also supports secure boot.

AM243x is an extension of Sitara’s industrial-grade portfolio into high-performance microcontrollers. The AM243x device is built for industrial applications, such as motor drives and remote I/O modules, which require a combination of real-time communications and processing. The AM243x family provides scalable performance with up to four Cortex-R5F MCUs, one Cortex-M4F, and two instances of Sitara’s gigabit TSN-enabled PRU_ICSSG.

The AM243x SoC architecture was designed to provide best-in-class real-time performance through the high-performance Arm Cortex-R5F cores, Tightly-Coupled Memory (TCM) banks, configurable SRAM partitioning, and dedicated low-latency paths to and from peripherals for rapid data movement in and out of the SoC. This deterministic architecture allows for AM243x to handle the tight control loops found in servo drives while the peripherals like FSI, GPMC, ECAPs, PWMs, and encoder interfaces help enable a number of different architectures found in these systems.

The SoC provides flexible industrial communications capability including full protocol stacks for EtherCAT target, PROFINET device, EtherNet/IP adapter, and IO-Link Controller. The PRU_ICSSG further provides capability for gigabit and TSN based protocols. In addition, the PRU_ICSSG enables additional interfaces including a UART interface, sigma delta decimation filters, and absolute encoder interfaces.

Functional safety features can be enabled through the integrated Cortex-M4F along with dedicated peripherals which can all be isolated from the rest of the SoC. AM243x also supports secure boot.

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Fecha
* Data sheet AM243x Sitara™ Microcontrollers datasheet (Rev. H) PDF | HTML 19 dic 2025
* Errata AM64x/AM243x Processor Silicon Revision 1.0, 2.0 (Rev. J) PDF | HTML 13 nov 2025
Application note Getting Started with Sysconfig Tool PDF | HTML 21 nov 2025
User guide Hardware Design Considerations for Custom Board Using AM6442, AM6422, AM6412 and AM2434 (ALV, ALX) Processor (Rev. D) PDF | HTML 24 oct 2025
User guide AM6442 , AM6422 , AM6412 and AM2434 Processor Schematic Design Guidelines and Schematic Review Checklist (Rev. E) PDF | HTML 10 oct 2025
Application note Custom Board Design and Simulation Guidelines for Processor High Speed Parallel Interfaces (Rev. A) PDF | HTML 05 sep 2025
Application note Industrial Communication Protocols Supported on TI Processors and MCUs (Rev. F) PDF | HTML 03 sep 2025
Functional safety information AM6x, AM24x Software Diagnostics Library TÜV SÜD Functional Safety Certificate for 9.2.0 SDK (Rev. A) 17 jul 2025
Application note Processors Tools Overview PDF | HTML 16 jun 2025
Functional safety information AM64x, AM243x IEC61508 TUV SUD Functional Safety Certificate 25 mar 2024
Product overview AM243x OSPI, QSPI Flash Selection Guide (Rev. A) PDF | HTML 06 feb 2024
Product overview Industrial Communication Protocol Support for Arm®-based Microcontrollers and Processors PDF | HTML 22 dic 2023
Application note Using TSN Ethernet Features to Improve Timing in Industrial Ethernet Controllers PDF | HTML 15 nov 2023
Product overview Functional Safety for AM2x and Hercules™ Microcontrollers PDF | HTML 08 nov 2023
User guide AM64x/AM243x Technical Reference Manual (Rev. H) 01 nov 2023
Application note Sitara MCU Thermal Design PDF | HTML 11 sep 2023
Application brief EtherCAT Connected Motor Drive System With Endat 2.2 Absolute Encoder Feedback PDF | HTML 07 sep 2023
Application note Integration of MbedTLS on SITARA MCU Devices PDF | HTML 03 ago 2023
White paper Time Sensitive Networking for Industrial Automation (Rev. C) 31 jul 2023
User guide 10-kW, Three-Phase, Three-Level (T-Type) Inverter Using AM263 PDF | HTML 11 jul 2023
Certificate BP-AM2BLDCSERVO EU Declaration of Conformity (DoC) 28 jun 2023
Application note Powering the AM243x With the TPS65219 PMIC PDF | HTML 26 jun 2023
Application note Intra Drive Communication Using 8b-10b Line Code With Programmable Real Time Uni PDF | HTML 24 may 2023
Application note High-Speed Interface Layout Guidelines (Rev. J) PDF | HTML 24 feb 2023
Application note FSI Bandwidth-Optimization for Multi-axis Servo Control PDF | HTML 14 dic 2022
Application note Debugging Sitara AM2x Microcontrollers PDF | HTML 24 oct 2022
Application note PRU-ICSS Feature Comparison (Rev. G) PDF | HTML 11 oct 2022
Application note Optimized Trigonometric Functions on TI Arm Cores (Rev. A) PDF | HTML 08 ago 2022
Application note AM64x/AM243x Extended Power-On Hours PDF | HTML 05 ago 2022
Application note AM243x/AM64x Single Chip Motor Control Benchmark PDF | HTML 30 mar 2022
Application note Using LP8733xx and TPS65218xx PMICs to Power AM64x and AM243x Sitara Processors PDF | HTML 16 feb 2022
White paper Utilizing Sitara Processors and Microcontrollers for Industry 4.0 Servo Drives (Rev. C) 06 oct 2021
White paper Revolutionizing Real-Time Control, Networking and Analytics w/ Sitara™ AM2x MCUs PDF | HTML 07 jul 2021
Application note AM64x/AM243x DDR Board Design and Layout Guidelines (Rev. A) PDF | HTML 01 jul 2021
Application note AM64x/AM243x Power Estimation Tool (Rev. A) PDF | HTML 01 jul 2021
More literature LaunchPad™ kit with Sitara™ AM243x MCU Pinout Map 18 jun 2021
User guide AM64x/AM243x BGA Escape Routing (Rev. A) PDF | HTML 06 abr 2021
Functional safety information The state of functional safety in Industry 4.0 27 nov 2018

Diseño y desarrollo

Soluciones de alimentación

Busque las soluciones de alimentación disponibles para el AM2431. TI ofrece soluciones de alimentación para sistemas en chip (SoC), procesadores, microcontroladores, sensores y matrices de compuertas programables de campo (FPGA), sean o no de TI.

Placa de evaluación

BOOSTXL-IOLINKM-8 — BoosterPack™ maestro IO-Link de 8 puertos

Este BoosterPack™se diseñó para funcionar con el kit LP-AM243 TI LaunchPad™ con el microcontrolador Sitara™ AM243x. En conjunto, este diseño implementa un dispositivo maestro IO-Link de 8 puertos con temporización rápida y determinista y configuración independiente de ciclos y velocidad de bits. (...)

Guía del usuario: PDF
Placa de evaluación

BP-AM2BLDCSERVO — AM2x Brushless-DC (BLDC) Servo Motor BoosterPack

The AM2x BLDC Servo Motor BoosterPack plug-in module is an add-on for the AM2x LaunchPad development kits. This BoosterPack provides up to two axes of 24V/8A BLDC driver, ADC/SDFM current feedback, industrial absolute encoder, and resolver feedback. 

Guía del usuario: PDF | HTML
Placa de evaluación

LP-AM243 — Kit de desarrollo LaunchPad™ de propósito general AM243x para MCU basadas en Arm®

El LP-AM243 es una placa de desarrollo para las unidades de microcontrolador Sitara™ de alto rendimiento de la serie AM243x. Esta placa es ideal para la evaluación inicial y la creación de prototipos, ya que proporciona una plataforma estandarizada y fácil de usar para desarrollar su próxima (...)

Guía del usuario: PDF | HTML
Placa de evaluación

RIO-DEV-PLATFORM — Remote IO development platform for Arm-based MCUs with industrial Ethernet

The Remote IO Development Platform provides tailored combinations of hardware and software designed to make it quick and easy to establish remote I/O connections for a variety of applications. This platform can be used to build a remote IO gateway to connect to industrial protocols such as (...)

Placa de evaluación

TMDS243DC01EVM — Placa de derivación del módulo de evaluación AM243x y AM64x para expansión de alta velocidad

TMDS243DC01EVM es el módulo de evaluación (EVM) de expansión de alta velocidad (HSE) para productos AM243x. Esta EVM es una placa complementaria para el EVM AM243x (TMDS243EVM).

TMDS243DC01EVM incluye una desconexión de señal de uso general que proporciona acceso de prueba a todas las señales de (...)

Guía del usuario: PDF | HTML
No disponible en TI.com
Placa de evaluación

TMDS243EVM — Módulo de evaluación AM243x para MCU basados en Arm® Cortex®-R5F

El módulo de evaluación (EVM) TMDS243 es una plataforma de prueba y desarrollo independiente para evaluar la funcionalidad del AM243x y desarrollar prototipos para múltiples aplicaciones. TMDS243EVM está equipado con la unidad de microcontrolador (MCU) Sitara™ AM2434 ALV de factor de forma más (...)

Guía del usuario: PDF | HTML
Placa de evaluación

TMDS64DC01EVM — Tarjeta de desconexión de alta velocidad y enlace de E/S AM64x

The AM64x IO-Link and high speed expansion board is an add-on module for the AM64x GP EVM.  This board includes eight (8) IO-Link ports and general purpose signal breakout.  The Breakout board section provides the test access to all the IO signals included on the High Speed Expansion (...)

Guía del usuario: PDF | HTML
Placa de evaluación

PHYTC-3P-KIT-AM64 — Kit de desarrollo de phyBOARD®-AM64x

El kit de desarrollo phyBOARD®-AM64x es un sistema en módulo (SOM) y una placa portadora que incluye el phyCORE®-AM64x, una placa de procesador integrada robusta y confiable para sistemas de comunicación industrial sin cabezal. El SOM de 50 mm x 37 mm tiene una interconexión extensa de 280 pines (...)

Desde: PHYTEC
Placa de evaluación

TQ-3P-SITARASOMS — Sistema de TQ Group en módulos para procesadores y microcontroladores basados en TI Arm

TQ offers the complete range of services from development, through production and service right up to product life cycle management. The services cover assemblies, equipment and systems including hardware, software and mechanics. Customers can obtain all services from TQ on a modular basis as (...)
Desde: TQ-Group
Placa de evaluación

TQ-3P-SOM-TQMA243XL — TQ-Group TQMa243xL system on module for AM2434 Arm-based microcontroller

The embedded module TQMA243XL, is based on the processor family AM243x quad-core Arm® Cortex®-R5F-based MCU. This LGA (land grid array) module is designed to use the pin compatible processors on one module design. This module is ideally suited for headless applications with extended (...)

Desde: TQ-Group
Sonda de depuración

TMDSEMU110-U — Sonda de depuración XDS110 JTAG

El XDS110 de Texas Instruments es una nueva clase de sonda de depuración (emulador) para procesadores integrados de TI. El XDS110 sustituye a la familia XDS100, al tiempo que es compatible con una mayor variedad de estándares (IEEE1149.1, IEEE1149.7, SWD) en un único pod. Todas las sondas de (...)

Guía del usuario: PDF
Sonda de depuración

TMDSEMU560V2STM-U — Sonda de depuración USB de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Sonda de depuración

TMDSEMU560V2STM-UE — Sonda de depuración USB y ethernet de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Sonda de depuración

LB-3P-TRACE32-ARM — Sistema de depuración y seguimiento Lauterbach TRACE32 para microcontroladores y procesadores basado

Lauterbach‘s TRACE32® tools are a suite of leading-edge hardware and software components that enables developers to analyze, optimize and certify all kinds of Arm®-based microcontrollers and processors. The globally renowned debug and trace solutions for embedded systems and SoCs are the perfect (...)

Sonda de depuración

TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger

TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)

Kit de desarrollo de software (SDK)

IBV-3P-ICECAT — IBV EtherCAT MainDevice SDK for embedded systems

The icECAT EtherCAT Master Stack library by IBV is a Software Development Kit (SDK) for creating an EtherCAT MainDevice (master) system achieving best performance with lowest resource usage. It is especially designed for use on embedded systems with optimized Link Layer drivers with DMA support (...)
Kit de desarrollo de software (SDK)

INDUSTRIAL-COMMUNICATIONS-SDK-AM243X Industrial Communications SDK for AM243x - RTOS

This software development kit (SDK) includes real-time industrial communication protocols (EtherCAT, EtherNet/IP, PROFINET, IO-Link, etc.) on TI processors. It also has PRU-ICSS firmware, drivers, communication stack libraries, and application examples, along with documentation.

What's new:

  • (...)
Productos y hardware compatibles

Productos y hardware compatibles

Examinar Opciones de descarga
Kit de desarrollo de software (SDK)

MCU-PLUS-SDK-AM243X MCU+ SDK for AM243x – RTOS, No-RTOS

The AM243x microcontroller (MCU) software is a collection of software development kits (SDK) providing a software platform for TI embedded processors with easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. This software accelerates application development (...)

Productos y hardware compatibles

Productos y hardware compatibles

Examinar Opciones de descarga
Kit de desarrollo de software (SDK)

MOTOR-CONTROL-SDK-AM243X Motor Control SDK for AM243x - RTOS

The AM243x microcontroller (MCU) software is a collection of software development kits (SDK) providing a software platform for TI embedded processors with easy setup and fast out-of-the-box access to examples, benchmarks and demonstrations. This software accelerates application development (...)

Productos y hardware compatibles

Productos y hardware compatibles

Examinar Opciones de descarga
Firmware

USIT-3P-SECIC-HSM — Firmware Uni-Sentry SecIC-HSM

El SecIC-HSM está diseñado para cumplir con los requisitos de ciberseguridad necesarios para los chips MCU/SoC. El firmware HSM se puede aplicar en campos como automóviles, nuevas energías, fotovoltaica, robótica, salud y aviación. Las funciones de ciberseguridad proporcionadas disponibles incluyen (...)
Primeros pasos

TI-DEVELOPER-ZONE Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
Productos y hardware compatibles

Productos y hardware compatibles

IDE, configuración, compilador o depurador

CCSTUDIO Code Composer Studio™ integrated development environment (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

Productos y hardware compatibles

Productos y hardware compatibles

Iniciar Opciones de descarga
IDE, configuración, compilador o depurador

DDR-CONFIG-AM24 DDR Configuration Tool

This SysConfig based tool simplifies the process of configuring the DDR Subsystem Controller and PHY to interface to SDRAM devices. Based on the memory device, board design, and topology the tool outputs files to initialize and train the selected memory.
Productos y hardware compatibles

Productos y hardware compatibles

IDE, configuración, compilador o depurador

IAR-KICKSTART — IAR Embedded Workbench

IAR Embedded Workbench delivers a complete development toolchain for building and debugging embedded applications for your selected target microcontroller. The included IAR C/C++ Compiler generates highly optimized code for your application, and the C-SPY Debugger is a fully integrated debugger for (...)
Desde: IAR Systems
Guía del usuario: PDF
IDE, configuración, compilador o depurador

SYSCONFIG Standalone desktop version of SysConfig

SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.

SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)

Productos y hardware compatibles

Productos y hardware compatibles

Iniciar Opciones de descarga
Capacitación en línea

AM24X-ACADEMY AM24x Academy

AM24x Academy features easy-to-use training modules ranging from the basics of getting started to advanced development topics.
Productos y hardware compatibles

Productos y hardware compatibles

Sistema operativo (SO)

GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS

The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)
Herramienta de programación de software

UNIFLASH UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

Productos y hardware compatibles

Productos y hardware compatibles

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Soporte de software

SPRCAJ9 AM243x SW Build Sheet

Productos y hardware compatibles

Productos y hardware compatibles

Modelo de simulación

AM243x BSDL Model

SPRM781.ZIP (17 KB) - BSDL Model
Modelo de simulación

AM243x IBIS model (Rev. B)

SPRM783B.ZIP (263 KB) - IBIS Model
Modelo de simulación

AM243x Thermal Model

SPRM782.ZIP (1 KB) - Thermal Model
Modelo de simulación

AM64x/AM243x BSDL Model

SPRM732.ZIP (21 KB) - BSDL Model
Modelo de simulación

AM64x/AM243x IBIS Model (Rev. E)

SPRM730E.ZIP (1889 KB) - IBIS Model
Modelo de simulación

AM64x/AM243x SR2.0 BSDL Model

SPRM811.ZIP (21 KB) - BSDL Model
Herramienta de cálculo

SPRM779 AM64x Power Estimation Tool

Productos y hardware compatibles

Productos y hardware compatibles

Diseños de referencia

TIDA-010256 — Diseño de referencia de un sistema transmisor de ultrasonidos de 128 canales

Este diseño de referencia de transmisión de ultrasonido utiliza el transmisor de pulso de cinco niveles TX7516 de TI y el interruptor de alta tensión TMUX9832. El transmisor y el interruptor están conectados de forma 1:4 para abordar los requisitos de diseño de hardware compacto para los sistemas (...)
Design guide: PDF
Diseños de referencia

TIDA-010234 — Diseño de referencia maestro de IO-Link de 8 puertos

Este diseño de referencia implementa un maestro IO-Link con temporización rápida y determinista con ocho puertos. Cada puerto puede funcionar con una velocidad binaria y una temporización de ciclo independientes. Este diseño se puede utilizar para construir una puerta de enlace IO remota para (...)
Design guide: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
FCBGA (ALV) 441 Ultra Librarian
FCCSP (ALX) 293 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL)/reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene alguna pregunta sobre calidad, encapsulados o pedido de productos de TI, consulte el servicio de asistencia de TI. ​​​​​​​​​​​​​​

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