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AM62A7

ACTIVO

2 TOPS visión SoC con RGB-IR ISP para 1 o 2 cámaras, sistemas de baja potencia, visión artificial, r

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AM62A7

ACTIVO
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Detalles del producto

CPU 2 Arm Cortex-A53, 4 Arm Cortex-A53 Frequency (MHz) 1400 Coprocessors 1 Arm Cortex-R5F Display type MIPI DPI Protocols Ethernet, TSN Hardware accelerators C7™ NPU, Deep learning accelerator, Video decode accelerator, Video encode accelerator, Vision processing accelerator Features Vision Analytics Operating system Linux, RTOS Security Secure boot Rating Catalog Power supply solution TPS65219 Operating temperature range (°C) -40 to 125 Edge AI enabled Edge AI Studio enabled
CPU 2 Arm Cortex-A53, 4 Arm Cortex-A53 Frequency (MHz) 1400 Coprocessors 1 Arm Cortex-R5F Display type MIPI DPI Protocols Ethernet, TSN Hardware accelerators C7™ NPU, Deep learning accelerator, Video decode accelerator, Video encode accelerator, Vision processing accelerator Features Vision Analytics Operating system Linux, RTOS Security Secure boot Rating Catalog Power supply solution TPS65219 Operating temperature range (°C) -40 to 125 Edge AI enabled Edge AI Studio enabled
FCBGA (AMB) 484 324 mm² 18 x 18 FCCSP (ANF) 484 324 mm² 18 x 18

Processor Cores:

  • Up to Quad 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.4GHz
    • Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC
    • Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
  • Single-core Arm Cortex-R5F at up to 800MHz, integrated as part of MCU Channel with FFI
    • 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories
    • 512KB SRAM with SECDED ECC
  • Single-core Arm Cortex-R5F at up to 800MHz, integrated to support Device Management
    • 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories
  • Deep Learning Accelerator based on Single-core C7x
    • C7x floating point, up to 40 GFLOPS, 256-bit Vector DSP at 1.0GHz
    • Matrix Multiply Accelerator (MMA), up to 2TOPS (8b) at 1.0GHz
    • 64KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
    • 1.25MB of L2 SRAM with SECDED ECC
  • Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators:
    • 315MPixel/s ISP; Up to 5MP @ 60fps
    • Support for 12-bit RGB-IR
    • Support for up to 16-bit input RAW format
    • Line support up to 4096
    • Wide Dynamic Range (WDR), Lens Distortion Correction (LDC), Vision Imaging Subsystem (VISS), and Multi-Scalar (MSC) support
      • Output color format : 8-bits, 12-bits, and YUV 4:2:2, YUV 4:2:0, RGB, HSV/HSL

Multimedia:

  • Display subsystem
    • Single display support
    • Up to 2048x1080 @ 60fps
    • Up to 165MHz pixel clock support with independent PLL
    • DPI 24-bit RGB parallel interface
    • Supports safety features such as freeze frame detection and MISR data check
  • One Camera Serial interface (CSI-2) Receiver with 4-Lane D-PHY
    • MIPI CSI-2 v1.3 Compliant + MIPI D-PHY 1.2
    • Support for 1,2,3 or 4 data lane mode up to 2.5Gbps per lane
    • ECC verification/correction with CRC check + ECC on RAM
    • Virtual Channel support (up to 16)
    • Ability to write stream data directly to DDR via DMA
  • Video Encoder/Decoder
    • Support for HEVC (H.265) Main profiles at Level 5.1 High-tier
    • Support for H.264 BaseLine/Main/High Profiles at Level 5.2
    • Support for up to 4K UHD resolution (3840 × 2160)
      • Clocking options supporting 240MPixels/s, 120MPixels/s, or 60MPixels/s
  • Motion JPEG encode at 416MPixels/s withresolutions up to 4K UHD (3840 × 2160)

Memory Subsystem:

  • Up to 2.29MB of On-chip RAM
    • 64KB of On-Chip RAM (OCRAM) with SECDED ECC, can be divided into smaller banks in increments of 32KB for as many as 2 separate memory banks
    • 256KB of On-Chip RAM with SECDED ECC in SMS Subsystem
    • 176KB of On-Chip RAM with SECDED ECC in SMS Subsystem for TI security firmware
    • 512KB of On-chip RAM with SECDED ECC in Cortex-R5F MCU Subsystem
    • 64KB of On-chip RAM with SECDED ECC in Device/Power Manager Subsystem
    • 1.25MB of L2 SRAM with SECDED ECC in C7x Deep Learning Accelerator
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4
    • 32-bit data bus with inline ECC
    • Supports speeds up to 3733MT/s
    • Max addressable range of 8GBytes

Functional Safety:

  • Functional Safety-Compliant targeted [Industrial]
    • Developed for functional safety applications
    • Documentation will be available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL 3 targeted
    • Hardware Integrity up to SIL 2 targeted
    • Safety-related certification
      • IEC 61508 by TÜV SÜD planned
  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation will be available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL D targeted
    • Hardware integrity up to ASIL B targeted
    • Safety-related certification
      • ISO 26262 by TÜV SÜD planned
  • AEC - Q100 qualified [Automotive]

Security:

  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Trusted Execution Environment (TEE) supported
    • Arm TrustZone based TEE
    • Extensive firewall support for isolation
    • Secure watchdog/timer/IPC
    • Secure storage support
    • Replay Protected Memory Block (RPMB) support
  • Dedicated Security Controller with user programmable HSM core and dedicated security DMA & IPC subsystem for isolated processing
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
      • Supports cryptographic cores
    • AES – 128-/192-/256-Bit key sizes
    • SHA2 – 224-/256-/384-/512-Bit key sizes
    • DRBG with true random number generator
    • PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging

High-Speed Interfaces:

  • Integrated Ethernet switch supporting (total 2 external ports)
    • RMII(10/100) or RGMII (10/100/1000)
    • IEEE1588 (Annex D, Annex E, Annex F with 802.1AS PTP)
    • Clause 45 MDIO PHY management
    • Packet Classifier based on ALE engine with 512 classifiers
    • Priority based flow control
    • Time Sensitive Networking (TSN) support
    • Four CPU H/W interrupt Pacing
    • IP/UDP/TCP checksum offload in hardware
  • Two USB2.0 Ports
    • Port configurable as USB host, USB peripheral, or USB Dual-Role Device (DRD mode)
    • Integrated USB VBUS detection

General Connectivity:

  • 9x Universal Asynchronous Receiver-Transmitters (UART)
  • 5x Serial Peripheral Interface (SPI) controllers
  • 6x Inter-Integrated Circuit (I2C) ports
  • 3x Multichannel Audio Serial Ports (McASP)
    • Transmit and Receive Clocks up to 50MHz
    • Up to 4/6/16 Serial Data Pins across 3x McASP with Independent TX and RX Clocks
    • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
    • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
    • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Support for audio reference output clock
  • 3x enhanced PWM modules (ePWM)
  • 3x enhanced Quadrature Encoder Pulse modules (eQEP)
  • 3x enhanced Capture modules (eCAP)
  • General-Purpose I/O (GPIO), All LVCMOS I/O can be configured as GPIO
  • 3x Controller Area Network (CAN) modules with CAN-FD support
    • Conforms w/ CAN Protocol 2.0 A, B and ISO 11898-1
    • Full CAN FD support (up to 64 data bytes)
    • Parity/ECC check for Message RAM
    • Speed up to 8Mbps

Media and Data Storage:

  • 3x Multi-Media Card/Secure Digital (MMC/SD/SDIO) interface
    • 1x 8-bit eMMC interface up to HS200 speed
    • 2x 4-bit SD/SDIO interface up to UHS-I
    • Compliant with eMMC 5.1, SD 3.0, and SDIO Version 3.0
  • 1× General-Purpose Memory Controller (GPMC) up to 133MHz
    • Flexible 8- and 16-bit Asynchronous Memory Interface with up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM)
    • Uses BCH code to support 4-, 8-, or 16-bit ECC
    • Uses Hamming code to support 1-bit ECC
    • Error Locator Module (ELM)
      • Used with the GPMC to locate addresses of data errors from syndrome polynomials generated using a BCH algorithm
      • Supports 4-, 8-, and 16-bit per 512-Byte block error location based on BCH algorithms
  • OSPI/QSPI with DDR / SDR support
    • Support for Serial NAND and Serial NOR Flash devices
    • 4GBytes memory address support
    • XIP mode with optional on-the-fly encryption

Power Management:

  • Low-power modes supported by Device/Power Manager
    • Partial IO support for CAN/GPIO/UART wakeup
    • DeepSleep : I/O + DDR (suspend to RAM)
    • DeepSleep
    • MCU Only
    • Standby
    • Dynamic frequency scaling for Cortex-A53

Boot Options:

  • UART
  • I2C EEPROM
  • OSPI/QSPI Flash
  • GPMC NOR/NAND Flash
  • Serial NAND Flash
  • SD Card
  • eMMC
  • USB (host) boot from Mass Storage device
  • USB (device) boot from external host (DFU mode)
  • Ethernet

Technology / Package:

  • 16-nm FinFET technology
  • 18mm x 18mm, 0.8mm pitch full-array, 484-pin FCBGA (AMB)
  • 18mm x 18mm, 0.8mm pitch full-array, 484-pin FCCSP (ANF)

Processor Cores:

  • Up to Quad 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.4GHz
    • Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC
    • Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
  • Single-core Arm Cortex-R5F at up to 800MHz, integrated as part of MCU Channel with FFI
    • 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories
    • 512KB SRAM with SECDED ECC
  • Single-core Arm Cortex-R5F at up to 800MHz, integrated to support Device Management
    • 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories
  • Deep Learning Accelerator based on Single-core C7x
    • C7x floating point, up to 40 GFLOPS, 256-bit Vector DSP at 1.0GHz
    • Matrix Multiply Accelerator (MMA), up to 2TOPS (8b) at 1.0GHz
    • 64KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
    • 1.25MB of L2 SRAM with SECDED ECC
  • Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators:
    • 315MPixel/s ISP; Up to 5MP @ 60fps
    • Support for 12-bit RGB-IR
    • Support for up to 16-bit input RAW format
    • Line support up to 4096
    • Wide Dynamic Range (WDR), Lens Distortion Correction (LDC), Vision Imaging Subsystem (VISS), and Multi-Scalar (MSC) support
      • Output color format : 8-bits, 12-bits, and YUV 4:2:2, YUV 4:2:0, RGB, HSV/HSL

Multimedia:

  • Display subsystem
    • Single display support
    • Up to 2048x1080 @ 60fps
    • Up to 165MHz pixel clock support with independent PLL
    • DPI 24-bit RGB parallel interface
    • Supports safety features such as freeze frame detection and MISR data check
  • One Camera Serial interface (CSI-2) Receiver with 4-Lane D-PHY
    • MIPI CSI-2 v1.3 Compliant + MIPI D-PHY 1.2
    • Support for 1,2,3 or 4 data lane mode up to 2.5Gbps per lane
    • ECC verification/correction with CRC check + ECC on RAM
    • Virtual Channel support (up to 16)
    • Ability to write stream data directly to DDR via DMA
  • Video Encoder/Decoder
    • Support for HEVC (H.265) Main profiles at Level 5.1 High-tier
    • Support for H.264 BaseLine/Main/High Profiles at Level 5.2
    • Support for up to 4K UHD resolution (3840 × 2160)
      • Clocking options supporting 240MPixels/s, 120MPixels/s, or 60MPixels/s
  • Motion JPEG encode at 416MPixels/s withresolutions up to 4K UHD (3840 × 2160)

Memory Subsystem:

  • Up to 2.29MB of On-chip RAM
    • 64KB of On-Chip RAM (OCRAM) with SECDED ECC, can be divided into smaller banks in increments of 32KB for as many as 2 separate memory banks
    • 256KB of On-Chip RAM with SECDED ECC in SMS Subsystem
    • 176KB of On-Chip RAM with SECDED ECC in SMS Subsystem for TI security firmware
    • 512KB of On-chip RAM with SECDED ECC in Cortex-R5F MCU Subsystem
    • 64KB of On-chip RAM with SECDED ECC in Device/Power Manager Subsystem
    • 1.25MB of L2 SRAM with SECDED ECC in C7x Deep Learning Accelerator
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4
    • 32-bit data bus with inline ECC
    • Supports speeds up to 3733MT/s
    • Max addressable range of 8GBytes

Functional Safety:

  • Functional Safety-Compliant targeted [Industrial]
    • Developed for functional safety applications
    • Documentation will be available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL 3 targeted
    • Hardware Integrity up to SIL 2 targeted
    • Safety-related certification
      • IEC 61508 by TÜV SÜD planned
  • Functional Safety-Compliant targeted [Automotive]
    • Developed for functional safety applications
    • Documentation will be available to aid ISO 26262 functional safety system design
    • Systematic capability up to ASIL D targeted
    • Hardware integrity up to ASIL B targeted
    • Safety-related certification
      • ISO 26262 by TÜV SÜD planned
  • AEC - Q100 qualified [Automotive]

Security:

  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Trusted Execution Environment (TEE) supported
    • Arm TrustZone based TEE
    • Extensive firewall support for isolation
    • Secure watchdog/timer/IPC
    • Secure storage support
    • Replay Protected Memory Block (RPMB) support
  • Dedicated Security Controller with user programmable HSM core and dedicated security DMA & IPC subsystem for isolated processing
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
      • Supports cryptographic cores
    • AES – 128-/192-/256-Bit key sizes
    • SHA2 – 224-/256-/384-/512-Bit key sizes
    • DRBG with true random number generator
    • PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging

High-Speed Interfaces:

  • Integrated Ethernet switch supporting (total 2 external ports)
    • RMII(10/100) or RGMII (10/100/1000)
    • IEEE1588 (Annex D, Annex E, Annex F with 802.1AS PTP)
    • Clause 45 MDIO PHY management
    • Packet Classifier based on ALE engine with 512 classifiers
    • Priority based flow control
    • Time Sensitive Networking (TSN) support
    • Four CPU H/W interrupt Pacing
    • IP/UDP/TCP checksum offload in hardware
  • Two USB2.0 Ports
    • Port configurable as USB host, USB peripheral, or USB Dual-Role Device (DRD mode)
    • Integrated USB VBUS detection

General Connectivity:

  • 9x Universal Asynchronous Receiver-Transmitters (UART)
  • 5x Serial Peripheral Interface (SPI) controllers
  • 6x Inter-Integrated Circuit (I2C) ports
  • 3x Multichannel Audio Serial Ports (McASP)
    • Transmit and Receive Clocks up to 50MHz
    • Up to 4/6/16 Serial Data Pins across 3x McASP with Independent TX and RX Clocks
    • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
    • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
    • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Support for audio reference output clock
  • 3x enhanced PWM modules (ePWM)
  • 3x enhanced Quadrature Encoder Pulse modules (eQEP)
  • 3x enhanced Capture modules (eCAP)
  • General-Purpose I/O (GPIO), All LVCMOS I/O can be configured as GPIO
  • 3x Controller Area Network (CAN) modules with CAN-FD support
    • Conforms w/ CAN Protocol 2.0 A, B and ISO 11898-1
    • Full CAN FD support (up to 64 data bytes)
    • Parity/ECC check for Message RAM
    • Speed up to 8Mbps

Media and Data Storage:

  • 3x Multi-Media Card/Secure Digital (MMC/SD/SDIO) interface
    • 1x 8-bit eMMC interface up to HS200 speed
    • 2x 4-bit SD/SDIO interface up to UHS-I
    • Compliant with eMMC 5.1, SD 3.0, and SDIO Version 3.0
  • 1× General-Purpose Memory Controller (GPMC) up to 133MHz
    • Flexible 8- and 16-bit Asynchronous Memory Interface with up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM)
    • Uses BCH code to support 4-, 8-, or 16-bit ECC
    • Uses Hamming code to support 1-bit ECC
    • Error Locator Module (ELM)
      • Used with the GPMC to locate addresses of data errors from syndrome polynomials generated using a BCH algorithm
      • Supports 4-, 8-, and 16-bit per 512-Byte block error location based on BCH algorithms
  • OSPI/QSPI with DDR / SDR support
    • Support for Serial NAND and Serial NOR Flash devices
    • 4GBytes memory address support
    • XIP mode with optional on-the-fly encryption

Power Management:

  • Low-power modes supported by Device/Power Manager
    • Partial IO support for CAN/GPIO/UART wakeup
    • DeepSleep : I/O + DDR (suspend to RAM)
    • DeepSleep
    • MCU Only
    • Standby
    • Dynamic frequency scaling for Cortex-A53

Boot Options:

  • UART
  • I2C EEPROM
  • OSPI/QSPI Flash
  • GPMC NOR/NAND Flash
  • Serial NAND Flash
  • SD Card
  • eMMC
  • USB (host) boot from Mass Storage device
  • USB (device) boot from external host (DFU mode)
  • Ethernet

Technology / Package:

  • 16-nm FinFET technology
  • 18mm x 18mm, 0.8mm pitch full-array, 484-pin FCBGA (AMB)
  • 18mm x 18mm, 0.8mm pitch full-array, 484-pin FCCSP (ANF)

AM62Ax is an extension of the Sitara™ automotive-grade family of heterogeneous Arm® processors with embedded Deep Learning (DL), Video and Vision Processing acceleration, display interface and extensive automotive peripheral and networking options. AM62Ax is built for a set of cost-sensitive automotive applications including driver and in-cabin monitoring systems, next generation of eMirror system, as well as a broad set of industrial applications in Factory Automation, Building Automation, Robotics, and other markets. The cost optimized AM62Ax provides high-performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced automotive platforms supporting multiple sensor modalities in stand-alone Electronic Control Units (ECUs).

AM62Ax contains up to four Arm® Cortex®-A53 cores with 64-bit architecture, a Vision Processing Accelerator (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators, Deep Learning (DL) and video accelerators, a Cortex®-R5F MCU Channel core and a Cortex®-R5F Device Management core. The Cortex-A53s provide the powerful computing elements necessary for Linux applications as well as the implementation of traditional vision computing based-algorithms such as driver monitoring. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite including RGB-InfraRed (RGB-IR), support for higher bit depth, and features targeting analytics applications. Key cores include the next generation C7000™ DSP from Texas Instruments (“C7x”) with scalar and vector cores, dedicated “MMA” deep learning accelerator enabling performance up to 2 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C.

The 3-port Gigabit Ethernet switch has one internal port and two external ports with TSN support and can be used to enable industrial networking options. In addition, an extensive peripherals set is included in AM62Ax to enable system level connectivity such as USB, MMC/SD, Camera interface, OSPI, CAN-FD and GPMC for parallel host interface to an external ASIC/FPGA. AM62Ax supports secure boot for IP protection with the built-in HSM (Hardware Security Module) and also employs advanced power management support for portable and power-sensitive applications.

AM62Ax is an extension of the Sitara™ automotive-grade family of heterogeneous Arm® processors with embedded Deep Learning (DL), Video and Vision Processing acceleration, display interface and extensive automotive peripheral and networking options. AM62Ax is built for a set of cost-sensitive automotive applications including driver and in-cabin monitoring systems, next generation of eMirror system, as well as a broad set of industrial applications in Factory Automation, Building Automation, Robotics, and other markets. The cost optimized AM62Ax provides high-performance compute for both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of system integration to enable scalability and lower costs for advanced automotive platforms supporting multiple sensor modalities in stand-alone Electronic Control Units (ECUs).

AM62Ax contains up to four Arm® Cortex®-A53 cores with 64-bit architecture, a Vision Processing Accelerator (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators, Deep Learning (DL) and video accelerators, a Cortex®-R5F MCU Channel core and a Cortex®-R5F Device Management core. The Cortex-A53s provide the powerful computing elements necessary for Linux applications as well as the implementation of traditional vision computing based-algorithms such as driver monitoring. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a broader sensor suite including RGB-InfraRed (RGB-IR), support for higher bit depth, and features targeting analytics applications. Key cores include the next generation C7000™ DSP from Texas Instruments (“C7x”) with scalar and vector cores, dedicated “MMA” deep learning accelerator enabling performance up to 2 TOPS within the lowest power envelope in the industry when operating at the typical automotive worst case junction temperature of 125°C.

The 3-port Gigabit Ethernet switch has one internal port and two external ports with TSN support and can be used to enable industrial networking options. In addition, an extensive peripherals set is included in AM62Ax to enable system level connectivity such as USB, MMC/SD, Camera interface, OSPI, CAN-FD and GPMC for parallel host interface to an external ASIC/FPGA. AM62Ax supports secure boot for IP protection with the built-in HSM (Hardware Security Module) and also employs advanced power management support for portable and power-sensitive applications.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Fecha
* Data sheet AM62Ax Sitara™ Processors datasheet (Rev. D) PDF | HTML 20 jun 2025
* Errata AM62Ax Sitara™ Processors Silicon Errata, Silicon Revision 1.0 (Rev. C) PDF | HTML 10 oct 2025
* User guide AM62Ax Sitara Processors Technical Reference Manual (Rev. C) 08 dic 2025
Application note Throughput Characterization of OSPI and QSPI Serial NOR/NAND Flash Operations PDF | HTML 17 feb 2026
Application note Linux Audio on Sitara Socs PDF | HTML 12 dic 2025
Application note xSPI Custom Flash Debug Guide PDF | HTML 01 dic 2025
Application note Enabling Matter on Sitara MPU (Rev. A) PDF | HTML 24 nov 2025
Application note AM62x Audio Design Guide PDF | HTML 20 nov 2025
Application note Memory allocation for TIDL usage PDF | HTML 10 nov 2025
Application note Optimizing TI Deep Learning Performance on C7xMMA Processors via Memory and DDR Bandwidth Reduction PDF | HTML 06 nov 2025
User guide Hardware Design Considerations for Custom Board Design using AM62A3, AM62A7-Q1, AM62A1-Q1, AM62D-Q1 Processor (Rev. D) PDF | HTML 24 oct 2025
User guide AM62A3, AM62A7-Q1, AM62A1-Q1, AM62D-Q1 Processor Family Schematic, Design Guidelines and Review Checklist (Rev. C) PDF | HTML 17 sep 2025
User guide AM62x, AM62Ax, AM62D-Q1 and AM62Px Processor Family Schematic, Design Guidelines and Review Checklist (Rev. I) PDF | HTML 17 sep 2025
Application note AM62x, AM62Ax, AM62Px, AM62Lx Spread-Spectrum Clocking PDF | HTML 08 sep 2025
Application note Custom Board Design and Simulation Guidelines for Processor High Speed Parallel Interfaces (Rev. A) PDF | HTML 05 sep 2025
Functional safety information AM6x, AM24x Software Diagnostics Library TÜV SÜD Functional Safety Certificate for 9.2.0 SDK (Rev. A) 17 jul 2025
Application note Processors Tools Overview PDF | HTML 16 jun 2025
Application note Building a Driver and Occupancy Monitoring System with an RGB-IR Camera (Rev. A) PDF | HTML 20 mar 2025
Application note AM62Ax Power-Estimation Tool (PET)-- (Rev. B) PDF | HTML 07 mar 2025
White paper Securing Arm-Based Application Processors (Rev. F) PDF | HTML 26 feb 2025
Application note MCAN Debug Guide PDF | HTML 18 feb 2025
Application note Microcontroller Abstraction Layer on Jacinto™ and Sitara™ Embedded Processors PDF | HTML 28 ene 2025
User guide AM62Ax/AM62Dx Escape Routing for PCB Design (Rev. A) PDF | HTML 14 ene 2025
Application note AM62Ax, AM62Px LPDDR4 Board Design and Layout Guidelines (Rev. B) PDF | HTML 17 dic 2024
Application note Basic Ethernet Interface Debug With Linux PDF | HTML 11 oct 2024
Application note Minimal Platform Development on AM62x Devices (Rev. A) PDF | HTML 24 sep 2024
Application note AM6xA ISP Tuning Guide (Rev. A) PDF | HTML 08 may 2024
Application note Developing Multiple-Camera Applications on AM6x (Rev. A) PDF | HTML 14 feb 2024
Technical article What’s the best type of computer vision for AI applications? PDF | HTML 05 ene 2024
Application note Multimedia Applications on AM62A PDF | HTML 29 nov 2023
Application note Using TSN Ethernet Features to Improve Timing in Industrial Ethernet Controllers PDF | HTML 15 nov 2023
Application brief Keyword Spotting Using AI at the Edge With Sitara Processors PDF | HTML 28 sep 2023
White paper Time Sensitive Networking for Industrial Automation (Rev. C) 31 jul 2023
Application note Vision AI-Based Defect Detection on AM62A Using TI Edge AI Studio PDF | HTML 28 jul 2023
User guide TPS65931211-Q1 PMIC User Guide for AM62A PDF | HTML 27 jul 2023
White paper Driver and Occupancy Monitoring Systems on AM62A PDF | HTML 12 jul 2023
Application brief AM62A Soc Improves Barcode Readers with Hardware Accelerated Vision Processing 29 jun 2023
White paper Camera Mirror Systems on AM62A PDF | HTML 09 jun 2023
Application note AM62A Edge AI Retail Scanner Demo: Analysis for SoC Selection and Power Usage PDF | HTML 30 may 2023
White paper Easing the Pain of Safety Certified System Development PDF | HTML 24 may 2023
Application note Building an Edge AI Application for Automated Retail Scanner on AM6xA MPUs PDF | HTML 17 may 2023
Application note AM62Ax Maximum Current Ratings PDF | HTML 18 abr 2023
Technical article How vision processors are expanding edge AI capabilities in video doorbell and sma PDF | HTML 15 mar 2023
White paper Edge AI Smart Cameras Using Energy-Efficient AM62A Processor PDF | HTML 02 mar 2023
Application note Sitara™AM62A Benchmarks PDF | HTML 01 mar 2023
Application note High-Speed Interface Layout Guidelines (Rev. J) PDF | HTML 24 feb 2023

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

SK-AM62A-LP — Kit de inicio AM62A para procesadores Sitara™ de bajo consumo

El módulo de evaluación (EVM) del kit de inicio (SK) SK-AM62A-LP se basa en nuestro procesador de imágenes de IA AM62A. Incluye un procesador de señal de imagen (ISP) que admite hasta 5 MP a 60 fps, un acelerador de IA de 2 teraoperaciones por segundo (TOPS), un microprocesador Arm® Cortex®-A53 de (...)

Guía del usuario: PDF | HTML
No disponible en TI.com
Placa de evaluación

CRLNK-3P-MITYSOM-AM62A — Módulo de sistema integrado Critical Link MitySOM-AM62A para procesadores AM62A3 y AM62A7

La familia de módulos de sistema MitySOM-AM62A incorpora el procesador AM62Ax. El módulo incluye los subsistemas de memoria eMMC FLASH, interfaz periférica serie octal o cuádruple NOR FLASH y LPDDR4 RAM. Un MitySOM-AM62 proporciona una infraestructura de controlador lógico programable (CPU) (...)

Desde: Critical Link LLC
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Placa de evaluación

IWAVE-3P-OSM-LF-AM62A — iWave AM62A OSM-LF system on module for AM62A3 and AM62A7 processors

iWave iW-RainboW-G55M OSM SoM with AM62A3 and AM62A7 Sitara Processor

Desde: iWave Global EMEA-FZ LLC
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Placa de evaluación

PHYTC-3P-PHYCORE-AM62A — PHYTEC phyCORE-AM62A system on module for AM62A3 and AM62A7 processors

The phyCORE®-AM62A is the latest addition to PHYTECs family of AM62x based System on Modules. With pin compatibility to the phyCORE-AM62x SOM, the phyCORE-AM62A can be used to add edge computing and analytics to your application.

Desde: PHYTEC
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Sonda de depuración

TMDSEMU110-U — Sonda de depuración XDS110 JTAG

El XDS110 de Texas Instruments es una nueva clase de sonda de depuración (emulador) para procesadores integrados de TI. El XDS110 sustituye a la familia XDS100, al tiempo que es compatible con una mayor variedad de estándares (IEEE1149.1, IEEE1149.7, SWD) en un único pod. Todas las sondas de (...)

Guía del usuario: PDF
No disponible en TI.com
Sonda de depuración

TMDSEMU200-U — Sonda de depuración XDS200 USB

El XDS200 es una sonda de depuración (emulador) que se utiliza para depurar dispositivos integrados de TI. Para la mayoría de los dispositivos, se recomienda utilizar el XDS110 (www.ti.com/tool/TMDSEMU110-U), que es más nuevo y de menor costo. El XDS200 es compatible con una amplia variedad de (...)

No disponible en TI.com
Sonda de depuración

TMDSEMU560V2STM-U — Sonda de depuración USB de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

No disponible en TI.com
Sonda de depuración

TMDSEMU560V2STM-UE — Sonda de depuración USB y ethernet de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

No disponible en TI.com
Sonda de depuración

LB-3P-TRACE32-ARM — Sistema de depuración y seguimiento Lauterbach TRACE32 para microcontroladores y procesadores basado

Lauterbach‘s TRACE32® tools are a suite of leading-edge hardware and software components that enables developers to analyze, optimize and certify all kinds of Arm®-based microcontrollers and processors. The globally renowned debug and trace solutions for embedded systems and SoCs are the perfect (...)

Desde: Lauterbach GmbH
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Sonda de depuración

TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger

TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)

Desde: TASKING Germany GmbH
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Kit de desarrollo

SENST-3P-SG-CAMERA-MODULES — Sensing Technology camera modules for FPD-LINK

SENSING technology camera solutions can be readily integrated with TI processors and provide a complete vision solution for edge AI vision systems, it can provide FPDLink III & FPDLINK IV camera, GMSL camera, MIPI Camera for TDA4x and AM6x solutions.

Desde: Shenzhen SENSING Technology Co., Ltd
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Kit de desarrollo de software (SDK)

MCU-PLUS-SDK-AM62A — MCU+ SDK for AM62A – RTOS, No-RTOS

The AM62A vision processor Linux® and TI MCU plus software development kits (SDKs) are unified software platforms for our embedded processors with deep learning capabilities with edge AI. They provide easy setup and fast out-of-the-box access to benchmarks and demonstrations. AM62A is a high (...)

Productos y hardware compatibles

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Examinar Opciones de descarga
Kit de desarrollo de software (SDK)

PROCESSOR-SDK-LINUX-AM62A — Linux SDK for Edge AI applications on AM62A

The AM62A vision processor Linux® and TI MCU plus software development kits (SDKs) are unified software platforms for our embedded processors with deep learning capabilities with edge AI. They provide easy setup and fast out-of-the-box access to benchmarks and demonstrations. AM62A is a high (...)

Productos y hardware compatibles

Productos y hardware compatibles
Opciones de descarga
Kit de desarrollo de software (SDK)

PROCESSOR-SDK-LINUX-RT-AM62A — RT-Linux SDK for Edge AI applications on AM62A

The AM62A vision processor Linux® and TI MCU plus software development kits (SDKs) are unified software platforms for our embedded processors with deep learning capabilities with edge AI. They provide easy setup and fast out-of-the-box access to benchmarks and demonstrations. AM62A is a high (...)

Productos y hardware compatibles

Productos y hardware compatibles
Opciones de descarga
Kit de desarrollo de software (SDK)

PROCESSOR-SDK-QNX-AM62AX — QNX software development kit for AM62A Sitara™ processors

The AM62A vision processor Linux® and TI MCU plus software development kits (SDKs) are unified software platforms for our embedded processors with deep learning capabilities with edge AI. They provide easy setup and fast out-of-the-box access to benchmarks and demonstrations. AM62A is a high (...)

Productos y hardware compatibles

Productos y hardware compatibles
Solicitar
Software de aplicación y estructura

EB-3P-TRESOS — Software Elektrobit EB tresos Classic AUTOSAR

Con décadas de experiencia en el campo del software básico, la línea de productos EB Tresos de Elektrobit y las soluciones personalizadas de AUTOSAR Classic ayudan a satisfacer los requisitos específicos de cada fabricante de automóviles al ofrecer software de última tecnología. Para cada proyecto, (...)
Desde: Elektrobit
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Firmware

DDR-MARGIN-FW — Firmware and scripts to measure system DDR margin

The DDR margin firmware and supporting scripts allow visualization and measurement of system margin in the DDR interface on board. These tools enable probe-less measurement of critical data signals to understand the integrity and robustness of the interface.
Productos y hardware compatibles

Productos y hardware compatibles
Opciones de descarga
Firmware

USIT-3P-SECIC-HSM — Firmware Uni-Sentry SecIC-HSM

El SecIC-HSM está diseñado para cumplir con los requisitos de ciberseguridad necesarios para los chips MCU/SoC. El firmware HSM se puede aplicar en campos como automóviles, nuevas energías, fotovoltaica, robótica, salud y aviación. Las funciones de ciberseguridad proporcionadas disponibles incluyen (...)
Desde: Shanghai Uni-Sentry Intelligent Technology Co., LTD
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Firmware

USIT-3P-SECIC-PQC — Firmware de algoritmos Uni-Sentry SecIC-PQC

Las soluciones de seguridad de Uni-Sentry adoptan algoritmos PQC capaces de resistir las amenazas de descifrado planteadas por los ordenadores cuánticos a los algoritmos criptográficos tradicionales. El firmware del PQC está cooptimizado con el Módulo de Seguridad de Hardware (HSM), aprovechando la (...)
Desde: Shanghai Uni-Sentry Intelligent Technology Co., LTD
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Primeros pasos

TI-DEVELOPER-ZONE — Start embedded development on your desktop or in the cloud

From evaluation to deployment the TI Developer Zone provides a comprehensive range of software, tools and training to ensure that you have everything you need for each stage of the development process.
Productos y hardware compatibles

Productos y hardware compatibles
Empiece
IDE, configuración, compilador o depurador

C7000-CGT — C7000 code generation tools (CGT) - compiler

The TI C7000 C/C++ Compiler Tools support development of applications for TI C7000 Digital Signal Processor cores.

Code Composer Studio is the Integrated Development Environment (IDE) for TI embedded devices.  If you are looking to develop on a TI embedded device it is recommended to start (...)

Productos y hardware compatibles

Productos y hardware compatibles
Opciones de descarga
IDE, configuración, compilador o depurador

C7000-SAFETI-CQKIT-RV — C7000 safety compiler qualification kit (leverages compiler release validations)

The Safety Compiler Qualification Kit was developed to assist customers in qualifying their use of the TI ARM, C6000, C7000 or C2000/CLA C/C++ Compiler to functional safety standards such as IEC 61508 and ISO 26262.

The Safety Compiler Qualification Kit:

  • is free of charge for TI customers
  • does (...)
Productos y hardware compatibles

Productos y hardware compatibles
Opciones de descarga
IDE, configuración, compilador o depurador

CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

CCStudio™ IDE is part of TI's extensive CCStudio™ development tool ecosystem. It is an integrated development environment (IDE) for TI's microcontrollers, processors, wireless connectivity devices and radar sensors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize (...)

Productos y hardware compatibles

Productos y hardware compatibles
Iniciar Opciones de descarga
IDE, configuración, compilador o depurador

CLOCKTREE-AM62AX — Clock tree configuration for AM62Ax


The Clock Tree Tool (CTT) for ARM Processors & Digital Signal Processors is an interactive configuration software tool that provides information about device clock tree architecture. This tool allows visualization of the device clock tree. It can also be used to determine the exact register (...)

Productos y hardware compatibles

Productos y hardware compatibles
Iniciar
IDE, configuración, compilador o depurador

DDR-CONFIG-AM62A — DDR Configuration Tool

This SysConfig based tool simplifies the process of configuring the DDR Subsystem Controller and PHY to interface to SDRAM devices. Based on the memory device, board design, and topology the tool outputs files to initialize and train the selected memory.
Productos y hardware compatibles

Productos y hardware compatibles
Iniciar Descargar
IDE, configuración, compilador o depurador

EDGE-AI-STUDIO — Edge AI Studio

Edge AI Studio is part of the CCStudio™ development tool ecosystem.  Edge AI Studio is a collection of graphical and command line tools designed to accelerate edge AI development on TI processors, microcontrollers, connectivity devices and radar sensors.  It supports both AI-accelerated (...)

Productos y hardware compatibles

Productos y hardware compatibles
Iniciar
IDE, configuración, compilador o depurador

K3-RESOURCE-CONFIGURATION — Resource partitioning tool for multi core SOCs

Also known as the k3-respart-tool, the Resource Configuration tool allows for configuration of various system level parameters and generate the necessary data to be fed into software components
Productos y hardware compatibles

Productos y hardware compatibles
Iniciar
IDE, configuración, compilador o depurador

SYSCONFIG — Standalone desktop version of SysConfig

SysConfig is a configuration tool designed to simplify hardware and software configuration challenges to accelerate software development.

SysConfig is available as part of the Code Composer Studio™ integrated development environment as well as a standalone application. Additionally SysConfig (...)

Productos y hardware compatibles

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Iniciar Opciones de descarga
Capacitación en línea

AM62A-ACADEMY — AM62Ax Academy

AM62Ax Academy is designed to simplify and accelerate development on AM62Ax processors.
Productos y hardware compatibles

Productos y hardware compatibles
Examinar
Sistema operativo (SO)

GHS-3P-INTEGRITY-RTOS — INTEGRITY RTOS de Green Hills

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
Desde: Green Hills Software
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Sistema operativo (SO)

GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS

The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)
Desde: Green Hills Software
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Sistema operativo (SO)

WHIS-3P-SAFERTOS — RTOS de seguridad precertificado SAFERTOS de WITTENSTEIN

SAFERTOS® es un sistema operativo único en tiempo real diseñado para procesadores integrados. Está precertificado según las normas IEC 61508 SIL3 e ISO 26262 ASILD por TÜV SÜD. SAFERTOS® se diseñó específicamente para la seguridad por el equipo de expertos de WHIS y se usa globalmente en (...)
Desde: WITTENSTEIN High Integrity Systems
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Soporte de software

VCTR-3P-MICROSAR — Software de vector MICROSAR AUTOSAR para microcontroladores y computadoras de alto rendimiento (H

Las familias de productos MICROSAR y DaVinci simplifican el desarrollo de unidades de control electrónico (ECU) con software sofisticados integrados y herramientas de desarrollo poderosas para microcontroladores y HPC. Con el software de infraestructura avanzado, puede crear una base óptima para (...)
Desde: Vector Informatik GmbH
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Soporte de software

VLAB-3P-V-EVM — Herramientas y plataformas de desarrollo virtual ASTC VLAB

VLAB Works es el líder de la industria en tecnología de software para el modelado, la simulación y la creación de prototipos virtuales de sistemas electrónicos integrados. Las tecnologías y soluciones VLAB permiten la aplicación de automatización y procesos ágiles al desarrollo de sistemas (...)
Desde: VLAB Works
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Modelo de simulación

AM62A, AM62D ANF Package Thermal model

SPRM857.ZIP (1 KB) - Thermal Model
Descargar
Modelo de simulación

AM62Ax ANF IBIS Model

SPRM862.ZIP (3293 KB) - IBIS Model
Descargar
Modelo de simulación

AM62Ax ANF IBIS-AMI Model

SPRM867.ZIP (30794 KB) - IBIS-AMI Model
Descargar
Modelo de simulación

AM62Ax IBIS Model (Rev. C)

SPRM785C.ZIP (3292 KB) - IBIS Model
Descargar
Modelo de simulación

AM62Ax Sitara™ AMI Model

SPRM784.ZIP (30672 KB) - IBIS-AMI Model
Descargar
Modelo de simulación

AM62Ax Sitara™ BSDL Model

SPRM786.ZIP (10 KB) - BSDL Model
Descargar
Modelo de simulación

AM62Ax Thermal Model (Rev. A)

SPRM787A.ZIP (1 KB) - Thermal Model
Descargar
Plano de montaje

SK-AM62A-LP Design File Package for Engineering Revision (E1,E2,E3) (Rev. C)

SPRR459C.ZIP (92302 KB)
Descargar
Herramienta de cálculo

AM62A-PET-CALC — AM62A power estimation tool

AM62A PET provides power consumption estimates based on measured and simulated data; they are provided “as is” and are not guaranteed within a specified precision.
Productos y hardware compatibles

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
FCBGA (AMB) 484 Ultra Librarian
FCCSP (ANF) 484 Ultra Librarian
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL)/reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

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