The DRV3901-Q1 is a highly integrated
squib driver intended for automotive EV pyro-fuse applications. It includes the
power supplies, current sensing and regulation, and diagnostics and protection
functions needed to drive a squib load. It incorporates several key functions unique
to the device that are different from traditional squib drivers. These functions
include a hardware pin trigger interface, an energy reservoir capacitor diagnostic,
an addressable SPI, and optimized driver stage with integrated charge pump and
additional deployment current options.
The hardware pin trigger (TRGx)
interface allows for a deployment command to be issued directly in hardware to the
DRV3901-Q1. This allows the flexiblity to either trigger the deployment with MCU
hardware pins, directly with an overcurrent sensor, or through other external
hardware circuit monitors. The hardware trigger pins support a 2-pin interface with
both threshold or PWM based options to ensure robustness against miss deployment
while still providing flexiblity to support a variety of interface options.
Additionally, CRC protected deployment commands can be sent through the SPI bus as a
secondary method.
To support a diagnostic for the system
energy reservoir capacitor, the DRV3901-Q1 integrates a switch and monitor circuit
to be able to bias and monitor the discharge voltage of the reservoir capacitor.
This enables the device and the external MCU to detect a loss/failure of the
reservoir capacitor or its approximate value in normal operation.
An addressable SPI, allow multiple
devices to be controlled on a shared SPI bus. In addition to reducing required MCU
resources, the addressable SPI incorporates a broadcast command structure that
allows multiple drivers to be coordinated to trigger simultaneously or with
staggered delays. The SPI incorporate multiple robustness functions including a CRC,
address readback capability, and various bus fault detection mechanisms.
The power stage utilizes a protected
high-side and low-side switch to ensure robustness against unintended driving due to
a variety of fault conditions. An integrated charge pump ensures minimal drop out
voltage across the switches during deployment to enable operation down to low supply
voltages. A wide variety of deployment options are available to optimize for
different types of squib loads or for specific application requirements.
The DRV3901-Q1 is a highly integrated
squib driver intended for automotive EV pyro-fuse applications. It includes the
power supplies, current sensing and regulation, and diagnostics and protection
functions needed to drive a squib load. It incorporates several key functions unique
to the device that are different from traditional squib drivers. These functions
include a hardware pin trigger interface, an energy reservoir capacitor diagnostic,
an addressable SPI, and optimized driver stage with integrated charge pump and
additional deployment current options.
The hardware pin trigger (TRGx)
interface allows for a deployment command to be issued directly in hardware to the
DRV3901-Q1. This allows the flexiblity to either trigger the deployment with MCU
hardware pins, directly with an overcurrent sensor, or through other external
hardware circuit monitors. The hardware trigger pins support a 2-pin interface with
both threshold or PWM based options to ensure robustness against miss deployment
while still providing flexiblity to support a variety of interface options.
Additionally, CRC protected deployment commands can be sent through the SPI bus as a
secondary method.
To support a diagnostic for the system
energy reservoir capacitor, the DRV3901-Q1 integrates a switch and monitor circuit
to be able to bias and monitor the discharge voltage of the reservoir capacitor.
This enables the device and the external MCU to detect a loss/failure of the
reservoir capacitor or its approximate value in normal operation.
An addressable SPI, allow multiple
devices to be controlled on a shared SPI bus. In addition to reducing required MCU
resources, the addressable SPI incorporates a broadcast command structure that
allows multiple drivers to be coordinated to trigger simultaneously or with
staggered delays. The SPI incorporate multiple robustness functions including a CRC,
address readback capability, and various bus fault detection mechanisms.
The power stage utilizes a protected
high-side and low-side switch to ensure robustness against unintended driving due to
a variety of fault conditions. An integrated charge pump ensures minimal drop out
voltage across the switches during deployment to enable operation down to low supply
voltages. A wide variety of deployment options are available to optimize for
different types of squib loads or for specific application requirements.