DRV8303

ACTIVO

Controlador de puerta trifásico de 65 V máx. con amplificadores de derivación de corriente y SPI

Detalles del producto

Rating Catalog Architecture Gate driver Control interface 3xPWM, 6xPWM Gate drive (A) 1.7 Vs (min) (V) 6 Vs ABS (max) (V) 65 Features Current sense Amplifier, SPI/I2C Operating temperature range (°C) -40 to 125
Rating Catalog Architecture Gate driver Control interface 3xPWM, 6xPWM Gate drive (A) 1.7 Vs (min) (V) 6 Vs ABS (max) (V) 65 Features Current sense Amplifier, SPI/I2C Operating temperature range (°C) -40 to 125
HTSSOP (DCA) 48 101.25 mm² (12.5 mm × 8.1 mm)
  • 6-V to 60-V Operating Supply Voltage Range
  • 1.7-A Source and 2.3-A Sink Gate Drive Current Capability
  • Slew Rate Control for EMI Reduction
  • Bootstrap Gate Driver With 100% Duty Cycle Support
  • 6 or 3 PWM Input Modes
  • Dual Integrated Current-Shunt Amplifiers With Adjustable Gain and Offset
  • 3.3-V and 5-V Interface Support
  • Serial Peripheral Interface (SPI)
  • Protection Features:
    • Programmable Dead Time Control (DTC)
    • Programmable Overcurrent Protection (OCP)
    • PVDD and GVDD Undervoltage Lockout (UVLO)
    • GVDD Overvoltage Lockout (OVLO)
    • Overtemperature Warning/Shutdown (OTW/OTS)
    • Reported through nFAULT, nOCTW, and SPI Registers

All trademarks are the property of their respective owners.

  • 6-V to 60-V Operating Supply Voltage Range
  • 1.7-A Source and 2.3-A Sink Gate Drive Current Capability
  • Slew Rate Control for EMI Reduction
  • Bootstrap Gate Driver With 100% Duty Cycle Support
  • 6 or 3 PWM Input Modes
  • Dual Integrated Current-Shunt Amplifiers With Adjustable Gain and Offset
  • 3.3-V and 5-V Interface Support
  • Serial Peripheral Interface (SPI)
  • Protection Features:
    • Programmable Dead Time Control (DTC)
    • Programmable Overcurrent Protection (OCP)
    • PVDD and GVDD Undervoltage Lockout (UVLO)
    • GVDD Overvoltage Lockout (OVLO)
    • Overtemperature Warning/Shutdown (OTW/OTS)
    • Reported through nFAULT, nOCTW, and SPI Registers

All trademarks are the property of their respective owners.

The DRV8303 is a gate driver IC for three-phase motor-drive applications. The device provides three half bridge drivers, each capable of driving two N-channel MOSFETs. The device supports up to 1.7-A source and 2.3-A peak current capability. The DRV8303 can operate off of a single power supply with a wide range from 6-V to 60-V. It uses a bootstrap gate-driver architecture with trickle charge circuitry to support 100% duty cycle. The DRV8303 uses automatic hand shaking when the high-side or low-side MOSFET is switching to prevent current shoot through. Integrated VDS sensing of the high-side and low-side MOSFETs is used to protect the external power stage against overcurrent conditions.

The DRV8303 includes two current-shunt amplifiers for accurate current measurement. The amplifiers support bi-directional current sensing and provide and adjustable output offset up to 3 V.

The serial peripheral interface (SPI) provides detailed fault reporting and flexible parameter settings such as gain options for the current-shunt amplifiers and slew-rate control of the gate drivers.

For all available packages, see the orderable addendum at the end of the data sheet.

The DRV8303 is a gate driver IC for three-phase motor-drive applications. The device provides three half bridge drivers, each capable of driving two N-channel MOSFETs. The device supports up to 1.7-A source and 2.3-A peak current capability. The DRV8303 can operate off of a single power supply with a wide range from 6-V to 60-V. It uses a bootstrap gate-driver architecture with trickle charge circuitry to support 100% duty cycle. The DRV8303 uses automatic hand shaking when the high-side or low-side MOSFET is switching to prevent current shoot through. Integrated VDS sensing of the high-side and low-side MOSFETs is used to protect the external power stage against overcurrent conditions.

The DRV8303 includes two current-shunt amplifiers for accurate current measurement. The amplifiers support bi-directional current sensing and provide and adjustable output offset up to 3 V.

The serial peripheral interface (SPI) provides detailed fault reporting and flexible parameter settings such as gain options for the current-shunt amplifiers and slew-rate control of the gate drivers.

For all available packages, see the orderable addendum at the end of the data sheet.

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos DRV8303 Three-Phase Gate Driver With Dual-Current Shunt Amplifiers datasheet (Rev. C) PDF | HTML 8/12/2016
Nota sobre la aplicación Best Practices for Board Layout of Motor Drivers (Rev. B) PDF | HTML 14/10/2021
Nota sobre la aplicación Hardware Design Considerations for an Electric Bicycle using BLDC Motor (Rev. B) 23/06/2021
Nota sobre la aplicación System Design Considerations for High-Power Motor Driver Applications PDF | HTML 22/06/2021
Informe Power Electronics in Motor Drives: Where is it? (Rev. A) 1/10/2019
Nota sobre la aplicación Hardware Design Considerations for an Efficient Vacuum Cleaner Using a BLDC Moto (Rev. B) PDF | HTML 6/03/2019
Artículo técnico What happens when low-voltage BLDC motors drive appliance subsystems PDF | HTML 17/03/2016
Nota sobre la aplicación Sensored 3-Phase BLDC Motor Control Using MSP430 20/07/2011

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

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Placa de evaluación

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Guía del usuario: PDF
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Modelo de simulación

DRV8303 IBIS Model

SLOM463.ZIP (30 KB) - Modelo IBIS
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Pedidos y calidad

Soporte y capacitación

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