The DRV8306 device is an integrated gate driver for 3-phase brushless DC (BLDC) motor
applications. The device provides three half-bridge gate drivers, each capable of driving high-side
and low-side N-channel power MOSFETs. The DRV8306 device generates the proper gate drive voltages
using an integrated charge pump for the high-side MOSFETs and a linear regulator for the low-side
MOSFETs. The smart gate drive architecture supports up to 150-mA source and 300-mA sink peak gate
drive current and 15-mA rms gate drive current capability.
The device provides an internal 120° commutation for the trapezoidal BLDC motor. The
DRV8306 device has three Hall comparators which use the input from the Hall elements for internal
commutation. The duty cycle ratio of the phase voltage of the motor can be adjusted through the PWM
pin. Additional brake (nBRAKE) and direction (DIR) pins are provided for braking and setting the
direction of the BLDC motor. A 3.3-V, 30-mA low-dropout (LDO) regulator is provided to supply the
external controller and Hall elements. An additional FGOUT signal is provided which is a measure of
the commutation frequency. This signal can be used for implementing the closed-loop control of BLDC
motor.
A low-power sleep mode is provided to achieve low quiescent current draw by shutting down
most of the internal circuitry. Internal protection functions are provided for undervoltage
lockout, charge pump fault, MOSFET overcurrent, MOSFET short circuit, gate driver fault, and
overtemperature. Fault conditions are indicated on the nFAULT pin.
The DRV8306 device is an integrated gate driver for 3-phase brushless DC (BLDC) motor
applications. The device provides three half-bridge gate drivers, each capable of driving high-side
and low-side N-channel power MOSFETs. The DRV8306 device generates the proper gate drive voltages
using an integrated charge pump for the high-side MOSFETs and a linear regulator for the low-side
MOSFETs. The smart gate drive architecture supports up to 150-mA source and 300-mA sink peak gate
drive current and 15-mA rms gate drive current capability.
The device provides an internal 120° commutation for the trapezoidal BLDC motor. The
DRV8306 device has three Hall comparators which use the input from the Hall elements for internal
commutation. The duty cycle ratio of the phase voltage of the motor can be adjusted through the PWM
pin. Additional brake (nBRAKE) and direction (DIR) pins are provided for braking and setting the
direction of the BLDC motor. A 3.3-V, 30-mA low-dropout (LDO) regulator is provided to supply the
external controller and Hall elements. An additional FGOUT signal is provided which is a measure of
the commutation frequency. This signal can be used for implementing the closed-loop control of BLDC
motor.
A low-power sleep mode is provided to achieve low quiescent current draw by shutting down
most of the internal circuitry. Internal protection functions are provided for undervoltage
lockout, charge pump fault, MOSFET overcurrent, MOSFET short circuit, gate driver fault, and
overtemperature. Fault conditions are indicated on the nFAULT pin.