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DS90LV028AH

ACTIVO

Receptor de línea diferencial LVDS de 3 V y alta temperatura con CMOS doble

Detalles del producto

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVTTL, TTL Output signal LVCMOS, LVTTL Rating Catalog Operating temperature range (°C) -40 to 125
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (MBits) 400 Input signal LVTTL, TTL Output signal LVCMOS, LVTTL Rating Catalog Operating temperature range (°C) -40 to 125
SOIC (D) 8 29.4 mm² 4.9 x 6
  • –40°C to +125°C Operating Temperature Range
  • >400-Mbps (200-MHz) Switching Rates
  • 50-ps Differential Skew (Typical)
  • 0.1-ns Channel-to-Channel Skew (Typical)
  • 2.5-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • Flow-Through Pinout
  • Power Down High Impedance on LVDS Inputs
  • Low Power Design (18 mW at 3.3-V Static)
  • LVDS Inputs Accept LVDS/CML/LVPECL Signals
  • Conforms to ANSI/TIA/EIA-644 Standard
  • Available in SOIC Package
  • –40°C to +125°C Operating Temperature Range
  • >400-Mbps (200-MHz) Switching Rates
  • 50-ps Differential Skew (Typical)
  • 0.1-ns Channel-to-Channel Skew (Typical)
  • 2.5-ns Maximum Propagation Delay
  • 3.3-V Power Supply Design
  • Flow-Through Pinout
  • Power Down High Impedance on LVDS Inputs
  • Low Power Design (18 mW at 3.3-V Static)
  • LVDS Inputs Accept LVDS/CML/LVPECL Signals
  • Conforms to ANSI/TIA/EIA-644 Standard
  • Available in SOIC Package

The DS90LV028AH is a dual CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV028AH accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The DS90LV028AH has a flow-through design for easy PCB layout.

The DS90LV028AH and companion LVDS line driver DS90LV027AH provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

The DS90LV028AH is a dual CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.

The DS90LV028AH accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The DS90LV028AH has a flow-through design for easy PCB layout.

The DS90LV028AH and companion LVDS line driver DS90LV027AH provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

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Documentación técnica

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Tipo Título Fecha
* Data sheet DS90LV028AH high temperature 3-V LVDS dual differential line receiver datasheet (Rev. B) PDF | HTML 21 ene 2019
Application brief LVDS to Improve EMC in Motor Drives 27 sep 2018
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 03 ago 2018
Application brief How to Terminate LVDS Connections with DC and AC Coupling 16 may 2018
Application note An Overview of LVDS Technology 05 oct 1998

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

DS90LV027A-28AEVM — Módulo de evaluación de controlador y receptor LVDS de dos canales

The DS90LV027A-28A is an evaluation module designed for performance and functional evaluation of the Texas Instruments DS90LV027A LVDS dual  differential driver and DS90LV028A LVDS dual differential line receiver. With this kit, users can quickly evaluate the output waveform characteristics (...)
Modelo de simulación

DS90LV028A IBIS Model

SNLM018.ZIP (4 KB) - IBIS Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Paquete Pasadores Descargar
SOIC (D) 8 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI. ​​​​​​​​​​​​​​

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